[PATCH 0/6] HPPA fixes for v11

[PATCH 0/6] HPPA fixes for v11

[Helge Deller]

From: Helge Deller <deller@gmx.de>

Some late fixes for QEMU-v11

Various fixes in SeaBIOS-hppa and qemu code, most importantly
this fixes boot of the C3700, which broke while we added
support for CPUs with 40 and 44 bits physical address space.

Please review.

Thanks!
Helge

Helge Deller (6):
  hw/hppa: Fix description of the HP A400-44 server
  hw/hppa: Adjust physical addresses of Astro and Elroy
  target/hppa: Always map 64-bit firmware at 0xfffffff0f0000000
  hw/pci-host/astro: Use proper region names
  hw/hppa: Fix crash of 64-bit HP-UX 11 while flushing caches
  target/hppa: Update SeaBIOS-hppa to version 23

 hw/hppa/hppa_hardware.h     |   4 ++--
 hw/hppa/machine.c           |  18 +++++++++++++++++-
 hw/pci-host/astro.c         |   6 ++++--
 pc-bios/hppa-firmware.img   | Bin 632048 -> 631968 bytes
 pc-bios/hppa-firmware64.img | Bin 713608 -> 714440 bytes
 roms/seabios-hppa           |   2 +-
 target/hppa/mem_helper.c    |  10 ++++++----
 7 files changed, 30 insertions(+), 10 deletions(-)

-- 
2.53.0

[PATCH 1/6] hw/hppa: Fix description of the HP A400-44 server

[Helge Deller]

From: Helge Deller <deller@gmx.de>

The HP A400-44 machine has a height of 2U and is a noisy server machine
which was usually running in the datacenter.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/hppa/machine.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index ec63dc1297..e72dda2a68 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -840,7 +840,7 @@ static void HP_A400_machine_init_class_init(ObjectClass *oc, const void *data)
     };
     MachineClass *mc = MACHINE_CLASS(oc);
 
-    mc->desc = "HP A400-44 workstation";
+    mc->desc = "HP A400-44 server";
     mc->default_cpu_type = TYPE_HPPA_CPU_PA_8500;
     mc->valid_cpu_types = valid_cpu_types;
     mc->init = machine_HP_A400_init;
-- 
2.53.0

[PATCH 2/6] hw/hppa: Adjust physical addresses of Astro and Elroy

[Helge Deller]

From: Helge Deller <deller@gmx.de>

Adjust the addresses of the Astro and Elroy PCI chips to a
44-bit physical address space when running a PA8700 CPU.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/hppa/hppa_hardware.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
index 0a89c3ed52..006aae63b9 100644
--- a/hw/hppa/hppa_hardware.h
+++ b/hw/hppa/hppa_hardware.h
@@ -61,8 +61,8 @@
 #define ASTRO_BUS_MODULE        0x0a            /* C3700: 0x0a, others maybe 0 ? */
 
 /* ASTRO Memory and I/O regions */
-#define ASTRO_BASE_HPA            0xfffed00000
-#define ELROY0_BASE_HPA           0xfffed30000  /* ELROY0_HPA */
+#define ASTRO_BASE_HPA            0xffffed00000
+#define ELROY0_BASE_HPA           0xffffed30000  /* ELROY0_HPA */
 
 #define ROPES_PER_IOC           8       /* per Ike half or Pluto/Astro */
 
-- 
2.53.0

[PATCH 3/6] target/hppa: Always map 64-bit firmware at 0xfffffff0f0000000

[Helge Deller]

From: Helge Deller <deller@gmx.de>

I checked on a physical A500, C3700 and C8000 machine and all load their
64-bit PDC (Firmware) at 0xfffffff0f0000000, independed if the CPU uses
40 or 44 physical address bits.
For qemu we will do the same and load the 64-bit SeaBIOS-hppa at the
same address for our emulated machines.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 target/hppa/mem_helper.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index a4b382069d..ffbad8acfd 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -27,6 +27,7 @@
 #include "exec/target_page.h"
 #include "exec/helper-proto.h"
 #include "hw/core/cpu.h"
+#include "hw/hppa/hppa_hardware.h"
 #include "trace.h"
 
 hwaddr hppa_abs_to_phys_pa1x(uint8_t phys_addr_bits, vaddr addr)
@@ -66,12 +67,13 @@ hwaddr hppa_abs_to_phys_pa2_w0(uint8_t phys_addr_bits, vaddr addr)
         /*
          * PDC address space:
          * Figures H-10 and H-11 of the parisc2.0 spec do not specify
-         * where to map into the 64-bit PDC address space.
-         * We map with an offset which equals the 32-bit address, which
-         * is what can be seen on physical machines too.
+         * where to map into the 64-bit PDC address space, but verification
+         * on physical A500, C3700 and C8000 machines show that PDC is always
+         * mapped at 0xfffffff0f0000000, independed if the CPU has 40 or 44
+         * physical bits.
          */
         addr = (uint32_t)addr;
-        addr |= -1ull << (phys_addr_bits - 4);
+        addr |= ((uint64_t) FIRMWARE_HIGH) << 32;
     }
     return addr;
 }
-- 
2.53.0

[PATCH 4/6] hw/pci-host/astro: Use proper region names

[Helge Deller]

From: Helge Deller <deller@gmx.de>

All 64-bit hppa machines have at least 4 Elroy PCI busses in the system.
Make sure to use proper names in the qemu device tree, e.g. "elroy0" or
"elroy2-pci-mmio", to be able to distinguish between the various chips.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/pci-host/astro.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c
index 626aa9ce22..2c97d400bf 100644
--- a/hw/pci-host/astro.c
+++ b/hw/pci-host/astro.c
@@ -433,7 +433,7 @@ static void elroy_pcihost_realize(DeviceState *dev, Error **errp)
 
     /* Elroy config access from CPU.  */
     memory_region_init_io(&s->this_mem, obj, &elroy_chip_ops,
-                          s, "elroy", 0x2000);
+                          s, dev->id, 0x2000);
 
     /* Elroy PCI config. */
     memory_region_init_io(&phb->conf_mem, obj,
@@ -448,7 +448,9 @@ static void elroy_pcihost_realize(DeviceState *dev, Error **errp)
                                 &phb->data_mem);
 
     /* Elroy PCI bus memory.  */
-    memory_region_init(&s->pci_mmio, obj, "pci-mmio", UINT64_MAX);
+    g_autofree char *elroy_mmio_name;
+    elroy_mmio_name = g_strdup_printf("%s-pci-mmio", dev->id);
+    memory_region_init(&s->pci_mmio, obj, elroy_mmio_name, UINT64_MAX);
     memory_region_init_io(&s->pci_io, obj, &unassigned_io_ops, obj,
                             "pci-isa-mmio",
                             ((uint32_t) IOS_DIST_BASE_SIZE) / ROPES_PER_IOC);
-- 
2.53.0

[PATCH 5/6] hw/hppa: Fix crash of 64-bit HP-UX 11 while flushing caches

[Helge Deller]

From: Helge Deller <deller@gmx.de>

HP-UX 11 64-bit reads at bootup a word from address CPU_HPA + 0x500
while flushing the the cache of a T600.
Add a memory handler to avoid crashing while reading this word.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/hppa/machine.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index e72dda2a68..7e8ebbca3b 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -313,6 +313,22 @@ static TranslateFn *machine_HP_common_init_cpus(MachineState *machine)
         memory_region_add_subregion(addr_space,
                                     translate(NULL, CPU_HPA + i * 0x1000),
                                     cpu_region);
+
+        if (!hppa_is_pa20(&cpu[0]->env))
+            continue;
+
+        /* HP-UX 11 64-bit reads a word from address CPU_HPA + 0x500
+         * while flushing the the cache of a T600, which was the first
+         * server with a 64-bit PA-RISC 2.0 CPU.
+         * We return 0, since the value isn't used anyway. */
+        g_autofree char *cflush_name;
+        cflush_name = g_strdup_printf("cpu%u-T600-cacheflush", i);
+        MemoryRegion *cflush = g_new(MemoryRegion, 1);
+        memory_region_init_io(cflush, NULL, &hppa_pci_ignore_ops,
+                              NULL, cflush_name, 4);
+        memory_region_add_subregion(addr_space,
+                              translate(NULL, CPU_HPA + i * 0x1000 + 0x500),
+                              cflush);
     }
 
     /* RTC and DebugOutputPort on CPU #0 */
-- 
2.53.0

Re: [PATCH 4/6] hw/pci-host/astro: Use proper region names

[Philippe Mathieu-Daudé]

On 17/3/26 20:51, Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
> 
> All 64-bit hppa machines have at least 4 Elroy PCI busses in the system.
> Make sure to use proper names in the qemu device tree, e.g. "elroy0" or
> "elroy2-pci-mmio", to be able to distinguish between the various chips.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>   hw/pci-host/astro.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c
> index 626aa9ce22..2c97d400bf 100644
> --- a/hw/pci-host/astro.c
> +++ b/hw/pci-host/astro.c
> @@ -433,7 +433,7 @@ static void elroy_pcihost_realize(DeviceState *dev, Error **errp)
>   
>       /* Elroy config access from CPU.  */
>       memory_region_init_io(&s->this_mem, obj, &elroy_chip_ops,
> -                          s, "elroy", 0x2000);
> +                          s, dev->id, 0x2000);
>   
>       /* Elroy PCI config. */
>       memory_region_init_io(&phb->conf_mem, obj,
> @@ -448,7 +448,9 @@ static void elroy_pcihost_realize(DeviceState *dev, Error **errp)
>                                   &phb->data_mem);
>   
>       /* Elroy PCI bus memory.  */
> -    memory_region_init(&s->pci_mmio, obj, "pci-mmio", UINT64_MAX);
> +    g_autofree char *elroy_mmio_name;

Please move to function prologue:

     g_autofree char *elroy_mmio_name = NULL;

With that:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> +    elroy_mmio_name = g_strdup_printf("%s-pci-mmio", dev->id);
> +    memory_region_init(&s->pci_mmio, obj, elroy_mmio_name, UINT64_MAX);
>       memory_region_init_io(&s->pci_io, obj, &unassigned_io_ops, obj,
>                               "pci-isa-mmio",
>                               ((uint32_t) IOS_DIST_BASE_SIZE) / ROPES_PER_IOC);

Re: [PATCH 1/6] hw/hppa: Fix description of the HP A400-44 server

[Anton Johansson via qemu development]

On 17/03/26, Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
> 
> The HP A400-44 machine has a height of 2U and is a noisy server machine
> which was usually running in the datacenter.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  hw/hppa/machine.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
> index ec63dc1297..e72dda2a68 100644
> --- a/hw/hppa/machine.c
> +++ b/hw/hppa/machine.c
> @@ -840,7 +840,7 @@ static void HP_A400_machine_init_class_init(ObjectClass *oc, const void *data)
>      };
>      MachineClass *mc = MACHINE_CLASS(oc);
>  
> -    mc->desc = "HP A400-44 workstation";
> +    mc->desc = "HP A400-44 server";
>      mc->default_cpu_type = TYPE_HPPA_CPU_PA_8500;
>      mc->valid_cpu_types = valid_cpu_types;
>      mc->init = machine_HP_A400_init;
> -- 
> 2.53.0
> 

Reviewed-by: Anton Johansson <anjo@rev.ng>

Re: [PATCH 2/6] hw/hppa: Adjust physical addresses of Astro and Elroy

[Anton Johansson via qemu development]

On 17/03/26, Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
> 
> Adjust the addresses of the Astro and Elroy PCI chips to a
> 44-bit physical address space when running a PA8700 CPU.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  hw/hppa/hppa_hardware.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
> index 0a89c3ed52..006aae63b9 100644
> --- a/hw/hppa/hppa_hardware.h
> +++ b/hw/hppa/hppa_hardware.h
> @@ -61,8 +61,8 @@
>  #define ASTRO_BUS_MODULE        0x0a            /* C3700: 0x0a, others maybe 0 ? */
>  
>  /* ASTRO Memory and I/O regions */
> -#define ASTRO_BASE_HPA            0xfffed00000
> -#define ELROY0_BASE_HPA           0xfffed30000  /* ELROY0_HPA */
> +#define ASTRO_BASE_HPA            0xffffed00000
> +#define ELROY0_BASE_HPA           0xffffed30000  /* ELROY0_HPA */
>  
>  #define ROPES_PER_IOC           8       /* per Ike half or Pluto/Astro */
>  
> -- 
> 2.53.0
> 
> 

Reviewed-by: Anton Johansson <anjo@rev.ng>

Re: [PATCH 3/6] target/hppa: Always map 64-bit firmware at 0xfffffff0f0000000

[Anton Johansson via qemu development]

On 17/03/26, Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
> 
> I checked on a physical A500, C3700 and C8000 machine and all load their
> 64-bit PDC (Firmware) at 0xfffffff0f0000000, independed if the CPU uses
> 40 or 44 physical address bits.
> For qemu we will do the same and load the 64-bit SeaBIOS-hppa at the
> same address for our emulated machines.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  target/hppa/mem_helper.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
> index a4b382069d..ffbad8acfd 100644
> --- a/target/hppa/mem_helper.c
> +++ b/target/hppa/mem_helper.c
> @@ -27,6 +27,7 @@
>  #include "exec/target_page.h"
>  #include "exec/helper-proto.h"
>  #include "hw/core/cpu.h"
> +#include "hw/hppa/hppa_hardware.h"
>  #include "trace.h"
>  
>  hwaddr hppa_abs_to_phys_pa1x(uint8_t phys_addr_bits, vaddr addr)
> @@ -66,12 +67,13 @@ hwaddr hppa_abs_to_phys_pa2_w0(uint8_t phys_addr_bits, vaddr addr)
>          /*
>           * PDC address space:
>           * Figures H-10 and H-11 of the parisc2.0 spec do not specify
> -         * where to map into the 64-bit PDC address space.
> -         * We map with an offset which equals the 32-bit address, which
> -         * is what can be seen on physical machines too.
> +         * where to map into the 64-bit PDC address space, but verification
> +         * on physical A500, C3700 and C8000 machines show that PDC is always
> +         * mapped at 0xfffffff0f0000000, independed if the CPU has 40 or 44
> +         * physical bits.
>           */
>          addr = (uint32_t)addr;
> -        addr |= -1ull << (phys_addr_bits - 4);
> +        addr |= ((uint64_t) FIRMWARE_HIGH) << 32;
>      }
>      return addr;
>  }
> -- 
> 2.53.0
> 
> 

Reviewed-by: Anton Johansson <anjo@rev.ng>

Re: [PATCH 5/6] hw/hppa: Fix crash of 64-bit HP-UX 11 while flushing caches

[Anton Johansson via qemu development]

On 17/03/26, Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
> 
> HP-UX 11 64-bit reads at bootup a word from address CPU_HPA + 0x500
> while flushing the the cache of a T600.
> Add a memory handler to avoid crashing while reading this word.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  hw/hppa/machine.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
> index e72dda2a68..7e8ebbca3b 100644
> --- a/hw/hppa/machine.c
> +++ b/hw/hppa/machine.c


Changeset looks good apart from breaking coding convention


> @@ -313,6 +313,22 @@ static TranslateFn *machine_HP_common_init_cpus(MachineState *machine)
>          memory_region_add_subregion(addr_space,
>                                      translate(NULL, CPU_HPA + i * 0x1000),
>                                      cpu_region);
> +
> +        if (!hppa_is_pa20(&cpu[0]->env))
> +            continue;

braces around if statement


> +
> +        /* HP-UX 11 64-bit reads a word from address CPU_HPA + 0x500
> +         * while flushing the the cache of a T600, which was the first
> +         * server with a 64-bit PA-RISC 2.0 CPU.
> +         * We return 0, since the value isn't used anyway. */

/*
 * HP-UX 11 64-bit reads a word from address CPU_HPA + 0x500
 * while flushing the the cache of a T600, which was the first
 * server with a 64-bit PA-RISC 2.0 CPU.
 * We return 0, since the value isn't used anyway.
 */
 

> +        g_autofree char *cflush_name;

declare at top of for() scope, or top of function


> +        cflush_name = g_strdup_printf("cpu%u-T600-cacheflush", i);
> +        MemoryRegion *cflush = g_new(MemoryRegion, 1);

likewise


> +        memory_region_init_io(cflush, NULL, &hppa_pci_ignore_ops,
> +                              NULL, cflush_name, 4);
> +        memory_region_add_subregion(addr_space,
> +                              translate(NULL, CPU_HPA + i * 0x1000 + 0x500),
> +                              cflush);
>      }
>  
>      /* RTC and DebugOutputPort on CPU #0 */
> -- 
> 2.53.0
> 

Other than that

Reviewed-by: Anton Johansson <anjo@rev.ng>

Re: [PATCH 6/6] target/hppa: Update SeaBIOS-hppa to version 23

[Anton Johansson via qemu development]

On 17/03/26, Helge Deller wrote:
> From: Helge Deller <deller@gmx.de>
> 
> New SeaBIOS-hppa v23 release with various fixes for qemu-v11:
> - Various fixes to support CPUs with 40 and 44 bits physical address
> - Fix PAT_CPU call when asking for current CPU
> - Add function to stop CPU in PDC_PROC
> - Prevent execution of some functions when running as PAT firmware
> - Tune cache parameters to speed up cache flushes in operating systems
> - Revert resetting LSI SCSI with ODE on HP3000
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  pc-bios/hppa-firmware.img   | Bin 632048 -> 631968 bytes
>  pc-bios/hppa-firmware64.img | Bin 713608 -> 714440 bytes
>  roms/seabios-hppa           |   2 +-
>  3 files changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Anton Johansson <anjo@rev.ng>