From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-riscv@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
qemu-devel@nongnu.org, Laurent Vivier <laurent@vivier.eu>,
Pierrick Bouvier <pierrick.bouvier@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Richard Henderson <richard.henderson@linaro.org>,
Joel Stanley <joel@jms.id.au>
Subject: [PATCH v3 0/5] linux-user/riscv: add vector state to signal context
Date: Sun, 22 Mar 2026 00:13:38 +1000 [thread overview]
Message-ID: <20260321141345.599105-1-npiggin@gmail.com> (raw)
Changes in v3:
- Fixed up a bunch of good review comments that Richard made against
the v1 series here https://lore.kernel.org/all/06afcbdc-28e2-4d13-81d4-26fd257ed8a3@linaro.org/#r
in particular:
- Restoring vl/vtype state using CPU accessors rather than stuffing the
values into the registers directly.
- Fix ABI types.
- Fix some confusion with host/guest pointer mapping.
- Fix error handling to SIGSEGV.
- Style fixes.
- Fixed build issue without riscv intrinsics header.
- Add some more test cases.
Changes in v2:
- Fix 32-bit compile
- Moved sizeof_rt_sigframe change to its correct patch (patch 2 is the
one that extends the size of rt_sigframe, patch 3 is adding new
extended state to the frame which is added dynamically).
This series adds vector state to the linux-user signal handler,
and adds a basic signal handling test case. As a sanity check, I
also verified the signal handling test works in the same way when
run under a real Linux kernel.
Thanks,
Nick
Nicholas Piggin (5):
tests/tcg/riscv64: Add a user signal handling test
linux-user/riscv: Allow restore_sigcontext to return error
linux-user/riscv: Add extended state to sigcontext
linux-user/riscv: Add vector state to signal context
tests/tcg/riscv64: Add vector state to signal test
linux-user/riscv/signal.c | 281 +++++++++++-
linux-user/riscv/vdso-asmoffset.h | 4 +-
target/riscv/cpu.h | 4 +
target/riscv/csr.c | 7 +-
target/riscv/vector_helper.c | 19 +-
tests/tcg/riscv64/Makefile.target | 5 +
tests/tcg/riscv64/test-signal-handling.c | 517 +++++++++++++++++++++++
7 files changed, 807 insertions(+), 30 deletions(-)
create mode 100644 tests/tcg/riscv64/test-signal-handling.c
--
2.51.0
next reply other threads:[~2026-03-21 14:14 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-21 14:13 Nicholas Piggin [this message]
2026-03-21 14:13 ` [PATCH v3 1/5] tests/tcg/riscv64: Add a user signal handling test Nicholas Piggin
2026-03-25 3:07 ` Alistair Francis
2026-03-21 14:13 ` [PATCH v3 2/5] linux-user/riscv: Allow restore_sigcontext to return error Nicholas Piggin
2026-03-25 3:07 ` Alistair Francis
2026-03-21 14:13 ` [PATCH v3 3/5] linux-user/riscv: Add extended state to sigcontext Nicholas Piggin
2026-03-25 3:14 ` Alistair Francis
2026-03-21 14:13 ` [PATCH v3 4/5] linux-user/riscv: Add vector state to signal context Nicholas Piggin
2026-03-25 3:45 ` Alistair Francis
2026-03-21 14:13 ` [PATCH v3 5/5] tests/tcg/riscv64: Add vector state to signal test Nicholas Piggin
2026-03-25 3:49 ` Alistair Francis
2026-03-25 4:45 ` [PATCH v3 0/5] linux-user/riscv: add vector state to signal context Alistair Francis
2026-03-26 6:22 ` Nicholas Piggin
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