From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: Roman Bolshakov <rbolshakov@ddn.com>,
Wei Liu <wei.liu@kernel.org>,
Pedro Barbuda <pbarbuda@microsoft.com>,
Mohamed Mediouni <mohamed@unpredictable.fr>,
Phil Dennis-Jordan <phil@philjordan.eu>
Subject: [PATCH v2 13/13] whpx: i386: fast runtime state reads
Date: Mon, 23 Mar 2026 23:34:34 +0100 [thread overview]
Message-ID: <20260323223434.81780-14-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20260323223434.81780-1-mohamed@unpredictable.fr>
Now that there's an on-demand interface for fetching CRs
and segments, only query GPRs and query everything else
on-demand for vmexits.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
target/i386/whpx/whpx-all.c | 77 +++++++++++++++++++++++++++++++++----
1 file changed, 70 insertions(+), 7 deletions(-)
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index d87afceb08..ff842bf359 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -156,6 +156,26 @@ static const WHV_REGISTER_NAME whpx_register_names[] = {
*/
};
+static const WHV_REGISTER_NAME whpx_register_names_for_vmexit[] = {
+ /* X64 General purpose registers */
+ WHvX64RegisterRax,
+ WHvX64RegisterRcx,
+ WHvX64RegisterRdx,
+ WHvX64RegisterRbx,
+ WHvX64RegisterRsp,
+ WHvX64RegisterRbp,
+ WHvX64RegisterRsi,
+ WHvX64RegisterRdi,
+ WHvX64RegisterR8,
+ WHvX64RegisterR9,
+ WHvX64RegisterR10,
+ WHvX64RegisterR11,
+ WHvX64RegisterR12,
+ WHvX64RegisterR13,
+ WHvX64RegisterR14,
+ WHvX64RegisterR15,
+};
+
struct whpx_register_set {
WHV_REGISTER_VALUE values[RTL_NUMBER_OF(whpx_register_names)];
};
@@ -593,6 +613,47 @@ static void whpx_get_xcrs(CPUState *cpu)
cpu_env(cpu)->xcr0 = xcr0.Reg64;
}
+static void whpx_get_registers_for_vmexit(CPUState *cpu, WHPXStateLevel level)
+{
+ struct whpx_state *whpx = &whpx_global;
+ AccelCPUState *vcpu = cpu->accel;
+ X86CPU *x86_cpu = X86_CPU(cpu);
+ CPUX86State *env = &x86_cpu->env;
+ struct whpx_register_set vcxt;
+ HRESULT hr;
+ int idx;
+ int idx_next;
+
+ assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
+
+ hr = whp_dispatch.WHvGetVirtualProcessorRegisters(
+ whpx->partition, cpu->cpu_index,
+ whpx_register_names_for_vmexit,
+ RTL_NUMBER_OF(whpx_register_names_for_vmexit),
+ &vcxt.values[0]);
+ if (FAILED(hr)) {
+ error_report("WHPX: Failed to get virtual processor context, hr=%08lx",
+ hr);
+ }
+
+ idx = 0;
+
+ /* Indexes for first 16 registers match between HV and QEMU definitions */
+ idx_next = 16;
+ for (idx = 0; idx < CPU_NB_REGS; idx += 1) {
+ env->regs[idx] = vcxt.values[idx].Reg64;
+ }
+ idx = idx_next;
+
+ env->eip = vcpu->exit_ctx.VpContext.Rip;
+ env->eflags = vcpu->exit_ctx.VpContext.Rflags;
+ rflags_to_lflags(env);
+
+ assert(idx == RTL_NUMBER_OF(whpx_register_names_for_vmexit));
+
+ x86_update_hflags(env);
+}
+
void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
{
struct whpx_state *whpx = &whpx_global;
@@ -608,7 +669,11 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && !env->tsc_valid) {
+ if (level == WHPX_LEVEL_FAST_RUNTIME_STATE) {
+ return whpx_get_registers_for_vmexit(cpu, level);
+ }
+
+ if (!env->tsc_valid) {
whpx_get_tsc(cpu);
env->tsc_valid = !runstate_is_running();
}
@@ -623,7 +688,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
hr);
}
- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && whpx_irqchip_in_kernel()) {
+ if (whpx_irqchip_in_kernel()) {
/*
* Fetch the TPR value from the emulated APIC. It may get overwritten
* below with the value from CR8 returned by
@@ -680,7 +745,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
env->cr[4] = vcxt.values[idx++].Reg64;
assert(whpx_register_names[idx] == WHvX64RegisterCr8);
tpr = vcxt.values[idx++].Reg64;
- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && tpr != vcpu->tpr) {
+ if (tpr != vcpu->tpr) {
vcpu->tpr = tpr;
cpu_set_apic_tpr(x86_cpu->apic_state, whpx_cr8_to_apic_tpr(tpr));
}
@@ -691,9 +756,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
* Extended control registers needs to be handled separately depending
* on whether xsave is supported/enabled or not.
*/
- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE) {
- whpx_get_xcrs(cpu);
- }
+ whpx_get_xcrs(cpu);
/* 16 XMM registers */
assert(whpx_register_names[idx] == WHvX64RegisterXmm0);
@@ -768,7 +831,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level)
assert(idx == RTL_NUMBER_OF(whpx_register_names));
- if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && whpx_irqchip_in_kernel()) {
+ if (whpx_irqchip_in_kernel()) {
whpx_apic_get(x86_cpu->apic_state);
}
--
2.50.1 (Apple Git-155)
prev parent reply other threads:[~2026-03-23 22:37 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 22:34 [PATCH v2 00/13] whpx: i386: Windows 10 and performance fixes Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 01/13] whpx: i386: workaround for Windows 10 support Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 02/13] whpx: i386: enable exceptions VM exit only when needed Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 03/13] whpx: i386: skip TSC read for MMIO exits Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 04/13] whpx: i386: skip XCRs " Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 05/13] whpx: i386: don't restore segment registers after MMIO handling Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 06/13] target/i386: emulate: add new callbacks Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 07/13] whpx: i386: add implementation of new x86_emul_ops Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 08/13] target/i386: emulate: indirect access to CRs Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 09/13] whpx: i386: " Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 10/13] target/i386: emulate: segmentation rework Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 11/13] whpx: i386: fetch segments on-demand Mohamed Mediouni
2026-03-23 22:34 ` [PATCH v2 12/13] whpx: i386: workaround for segment granularity reading as 0 Mohamed Mediouni
2026-03-23 22:34 ` Mohamed Mediouni [this message]
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