From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com,
mst@redhat.com, jasowang@redhat.com, jgg@nvidia.com,
nicolinc@nvidia.com, skolothumtho@nvidia.com,
joao.m.martins@oracle.com, clement.mathieu--drif@bull.com,
kevin.tian@intel.com, yi.l.liu@intel.com, xudong.hao@intel.com,
Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH v2 10/14] intel_iommu_accel: Handle PASID entry removal for system reset
Date: Thu, 26 Mar 2026 05:11:24 -0400 [thread overview]
Message-ID: <20260326091130.321483-11-zhenzhong.duan@intel.com> (raw)
In-Reply-To: <20260326091130.321483-1-zhenzhong.duan@intel.com>
When system level reset, DMA translation is turned off, all PASID
entries become stale and should be deleted.
vtd_hiod list is never accessed without BQL, so no need to guard with
iommu lock.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
---
hw/i386/intel_iommu_accel.h | 5 +++++
hw/i386/intel_iommu.c | 2 ++
hw/i386/intel_iommu_accel.c | 13 +++++++++++++
3 files changed, 20 insertions(+)
diff --git a/hw/i386/intel_iommu_accel.h b/hw/i386/intel_iommu_accel.h
index c5981a23bf..1fb7ca0af6 100644
--- a/hw/i386/intel_iommu_accel.h
+++ b/hw/i386/intel_iommu_accel.h
@@ -28,6 +28,7 @@ void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,
uint32_t pasid, hwaddr addr,
uint64_t npages, bool ih);
void vtd_pasid_cache_sync_accel(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info);
+void vtd_pasid_cache_reset_accel(IntelIOMMUState *s);
void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops);
#else
static inline bool vtd_check_hiod_accel(IntelIOMMUState *s,
@@ -62,6 +63,10 @@ static inline void vtd_pasid_cache_sync_accel(IntelIOMMUState *s,
{
}
+static inline void vtd_pasid_cache_reset_accel(IntelIOMMUState *s)
+{
+}
+
static inline void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops)
{
}
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 451ede7530..b022f3cb9e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -391,6 +391,8 @@ static void vtd_reset_caches(IntelIOMMUState *s)
vtd_reset_context_cache_locked(s);
vtd_pasid_cache_reset_locked(s);
vtd_iommu_unlock(s);
+
+ vtd_pasid_cache_reset_accel(s);
}
static uint64_t vtd_get_iotlb_gfn(hwaddr addr, uint32_t level)
diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c
index 1e27c0feb8..e9e67eb1a0 100644
--- a/hw/i386/intel_iommu_accel.c
+++ b/hw/i386/intel_iommu_accel.c
@@ -511,6 +511,19 @@ void vtd_pasid_cache_sync_accel(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info)
}
}
+/* Fake a gloal pasid cache invalidation to remove all pasid cache entries */
+void vtd_pasid_cache_reset_accel(IntelIOMMUState *s)
+{
+ VTDPASIDCacheInfo pc_info = { .type = VTD_INV_DESC_PASIDC_G_GLOBAL };
+ VTDHostIOMMUDevice *vtd_hiod;
+ GHashTableIter as_it;
+
+ g_hash_table_iter_init(&as_it, s->vtd_host_iommu_dev);
+ while (g_hash_table_iter_next(&as_it, NULL, (void **)&vtd_hiod)) {
+ vtd_pasid_cache_invalidate(vtd_hiod, &pc_info);
+ }
+}
+
static uint64_t vtd_get_host_iommu_quirks(uint32_t type,
void *caps, uint32_t size)
{
--
2.47.3
next prev parent reply other threads:[~2026-03-26 9:13 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-26 9:11 [PATCH v2 00/14] intel_iommu: Enable PASID support for passthrough device Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 01/14] vfio/iommufd: Extend attach/detach_hwpt callback implementations with pasid Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 02/14] iommufd: Extend attach/detach_hwpt callbacks to support pasid Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 03/14] vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID flag Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 04/14] intel_iommu: Create the nested " Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 05/14] intel_iommu: Change pasid property from bool to uint8 Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 06/14] intel_iommu: Export some functions Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 07/14] intel_iommu_accel: Handle PASID entry addition for pc_inv_dsc request Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 08/14] intel_iommu_accel: Handle PASID entry removal " Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 09/14] intel_iommu_accel: Bypass PASID entry addition for just deleted entry Zhenzhong Duan
2026-03-26 9:11 ` Zhenzhong Duan [this message]
2026-03-26 9:11 ` [PATCH v2 11/14] intel_iommu_accel: Support pasid binding/unbinding and PIOTLB flushing Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 12/14] intel_iommu_accel: drop _lock suffix in vtd_flush_host_piotlb_all_locked() Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 13/14] intel_iommu_accel: Add pasid bits size check Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 14/14] intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED when configured Zhenzhong Duan
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