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Wed, 22 Apr 2026 20:44:00 +0000 Received: from CY3PR12MB9555.namprd12.prod.outlook.com ([fe80::fdb2:266d:ee2b:8d1e]) by CY3PR12MB9555.namprd12.prod.outlook.com ([fe80::fdb2:266d:ee2b:8d1e%6]) with mapi id 15.20.9846.016; Wed, 22 Apr 2026 20:44:00 +0000 From: Nathan Chen To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Eric Auger , Peter Maydell , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Zhao Liu , Shameer Kolothum , Matt Ochs , Nicolin Chen , Nathan Chen Subject: [PATCH v2 6/7] hw/arm/smmuv3: Set default ats, ril, ssidsize, oas to auto Date: Wed, 22 Apr 2026 13:43:34 -0700 Message-ID: <20260422204335.23116-7-nathanc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260422204335.23116-1-nathanc@nvidia.com> References: <20260422204335.23116-1-nathanc@nvidia.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SJ0PR05CA0133.namprd05.prod.outlook.com (2603:10b6:a03:33d::18) To CY3PR12MB9555.namprd12.prod.outlook.com (2603:10b6:930:10a::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY3PR12MB9555:EE_|SA1PR12MB7368:EE_ X-MS-Office365-Filtering-Correlation-Id: 2b29f64b-dd7a-4bdf-b0eb-08dea0afe198 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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envelope-from=nathanc@nvidia.com; helo=CY7PR03CU001.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set the default value of ATS, RIL, SSIDSIZE, and OAS to auto, in order to match the host IOMMU properties when accel=on. If accel=off and these property values are set to auto, the default property values defined in smmuv3_init_id_regs() for OAS and RIL will remain unchanged, while SSIDSIZE and ATS values will remain initialized at 0. Introduce a new compat for the changed defaults. Signed-off-by: Nathan Chen --- hw/arm/smmuv3.c | 14 +++++++------- hw/core/machine.c | 8 ++++++++ 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 39a6f72938..e8ca6be34a 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -2135,11 +2135,11 @@ static const Property smmuv3_properties[] = { /* GPA of MSI doorbell, for SMMUv3 accel use. */ DEFINE_PROP_UINT64("msi-gpa", SMMUv3State, msi_gpa, 0), /* RIL can be turned off for accel cases */ - DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril, ON_OFF_AUTO_ON), - DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats, ON_OFF_AUTO_OFF), - DEFINE_PROP_OAS_MODE("oas", SMMUv3State, oas, OAS_MODE_44), + DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril, ON_OFF_AUTO_AUTO), + DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats, ON_OFF_AUTO_AUTO), + DEFINE_PROP_OAS_MODE("oas", SMMUv3State, oas, OAS_MODE_AUTO), DEFINE_PROP_SSIDSIZE_MODE("ssidsize", SMMUv3State, ssidsize, - SSID_SIZE_MODE_0), + SSID_SIZE_MODE_AUTO), }; static void smmuv3_instance_init(Object *obj) @@ -2167,7 +2167,7 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) "configured in nested mode for vfio-pci dev assignment"); object_class_property_set_description(klass, "ril", "Enable/disable range invalidation support (for accel=on). " - "Valid values are on, off, and auto. Defaults to on. " + "Valid values are on, off, and auto. Defaults to auto. " "Please enable if host platform supports RIL, and disable if " "host platform does not support RIL."); object_class_property_set_description(klass, "ats", @@ -2176,10 +2176,10 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) "Please ensure host platform supports ATS before enabling."); object_class_property_set_description(klass, "oas", "Set Output Address Size in bits (for accel=on). " - "Valid values are 44, 48, and auto. Defaults to 44 bits."); + "Valid values are 44, 48, and auto. Defaults to auto."); object_class_property_set_description(klass, "ssidsize", "Set number of bits used to represent SubstreamIDs (SSIDs). " - "Valid values are 0-20 and auto. Defaults to 0. " + "Valid values are 0-20 and auto. Defaults to auto. " "A value of N allows SSIDs in the range [0 .. 2^N - 1]. " "A value of 0 disables SubstreamID support. A value greater " "than 0 is required to enable PASID support."); diff --git a/hw/core/machine.c b/hw/core/machine.c index 0aa77a57e9..a668bb2ec3 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -37,6 +37,14 @@ #include "hw/virtio/virtio-iommu.h" #include "hw/acpi/generic_event_device.h" #include "qemu/audio.h" +#include "hw/arm/smmuv3.h" + +GlobalProperty hw_compat_11_0[] = { + { TYPE_ARM_SMMUV3, "ats", "off" }, + { TYPE_ARM_SMMUV3, "ril", "on" }, + { TYPE_ARM_SMMUV3, "ssidsize", "0" }, + { TYPE_ARM_SMMUV3, "oas", "44" }, +}; GlobalProperty hw_compat_10_2[] = { { "scsi-block", "migrate-pr", "off" }, -- 2.43.0