From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37659) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z7MAZ-0003UB-Uo for qemu-devel@nongnu.org; Tue, 23 Jun 2015 07:15:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z7MAW-0001jR-O3 for qemu-devel@nongnu.org; Tue, 23 Jun 2015 07:15:11 -0400 Received: from mx6-phx2.redhat.com ([209.132.183.39]:57759) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z7MAW-0001iT-FS for qemu-devel@nongnu.org; Tue, 23 Jun 2015 07:15:08 -0400 Date: Tue, 23 Jun 2015 07:15:05 -0400 (EDT) From: Paolo Bonzini Message-ID: <2042486772.27571831.1435058105771.JavaMail.zimbra@redhat.com> In-Reply-To: <20150623123859.0f948b8d@nial.brq.redhat.com> References: <1432686576-14816-1-git-send-email-pcacjr@zytor.com> <1434933423-10496-1-git-send-email-pcacjr@zytor.com> <1434933423-10496-2-git-send-email-pcacjr@zytor.com> <20150623123859.0f948b8d@nial.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [SeaBIOS] [PATCH v4 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: seabios@seabios.org, Paulo Alcantara , qemu-devel@nongnu.org, mst@redhat.com ----- Original Message ----- > From: "Igor Mammedov" > To: "Paulo Alcantara" > Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, seabios@seabios.org, mst@redhat.com > Sent: Tuesday, June 23, 2015 12:38:59 PM > Subject: Re: [SeaBIOS] [PATCH v4 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table > > On Sun, 21 Jun 2015 21:37:02 -0300 > Paulo Alcantara wrote: > > > This block is mapped into memory space, using the Root Complex Base > > Address (RCBA) register of the PCI-to-LPC bridge. Accesses in this space > > must be limited to 32-(DW) bit quantities. Burst accesses are not > > allowed. > > > > All Chipset Configuration Registers are located in this 16KiB space. > > > > Signed-off-by: Paulo Alcantara > > --- > > v1 -> v2: > > * s/PDRC/CCR/ for clarity and match ICH9 spec > > * remove unnecessary OperationRegion for RCRB > > > > v2 -> v3: (no changes) > > > > v3 -> v4: > > * quote RCRB description from ICH9 spec to commit log > > * fix indentation issue in _CRS() method declaration > > * create hw/i386/ich9-cc.h for chipset configuration register values > > and use them in ASL > > --- > > hw/i386/q35-acpi-dsdt.dsl | 16 ++++++++++++++++ > > include/hw/i386/ich9-cc.h | 31 +++++++++++++++++++++++++++++++ > > tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7723 bytes > > 3 files changed, 47 insertions(+) > > create mode 100644 include/hw/i386/ich9-cc.h > > > > diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl > > index 16eaca3..512c220 100644 > > --- a/hw/i386/q35-acpi-dsdt.dsl > > +++ b/hw/i386/q35-acpi-dsdt.dsl > > @@ -114,6 +114,22 @@ DefinitionBlock ( > > } > > } > > > > +#include "hw/i386/ich9-cc.h" > > + > > +/**************************************************************** > > + * Chipset Configuration Registers > > + ****************************************************************/ > > +Scope(\_SB.PCI0) { > > + Device (CCR) { > I'd name it something like: TCOW Guys, can you *please* read the reviews to v1/2/3 and even to v4 itself?!?!? Paolo > > + Name (_HID, EISAID("PNP0C02")) > PNP0C02 not in ACPI spec, pls use PNP0A06 like we do in other places > for reserving IO space. > > > + Name (_UID, 1) > s/1/"TCO watchdog resources"/ > > + > > + Name (_CRS, ResourceTemplate() { > > + Memory32Fixed(ReadWrite, RCBA_BASE_ADDR, RCRB_SIZE) > since this values are dynamically programmed by BIOS > it's incorrect to put them here statically. > Take RCBA_BASE_ADDR from respective ICH9 register, > which should be programmed by BIOS before ACPI tables are read by it. > > Also like Michael suggested create this device dynamically in build_ssdt(), > for example look at "if (misc->applesmc_io_base) {" block in > hw/i386/acpi-build.c and add this device only if it's present > (i.e. for version from which it's supported) > > > + }) > > + } > > +} > > + > > #include "acpi-dsdt-hpet.dsl" > > > > > > diff --git a/include/hw/i386/ich9-cc.h b/include/hw/i386/ich9-cc.h > > new file mode 100644 > > index 0000000..675fb7f > > --- /dev/null > > +++ b/include/hw/i386/ich9-cc.h > > @@ -0,0 +1,31 @@ > > +/* > > + * QEMU ICH9 Chipset Configuration Registers > > + * > > + * Copyright (c) 2015 Paulo Alcantara > > + * > > + * Permission is hereby granted, free of charge, to any person obtaining a > > copy > > + * of this software and associated documentation files (the "Software"), > > to deal > > + * in the Software without restriction, including without limitation the > > rights > > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or > > sell > > + * copies of the Software, and to permit persons to whom the Software is > > + * furnished to do so, subject to the following conditions: > > + * > > + * The above copyright notice and this permission notice shall be included > > in > > + * all copies or substantial portions of the Software. > > + * > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS > > OR > > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF > > MERCHANTABILITY, > > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR > > OTHER > > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > > FROM, > > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > > IN > > + * THE SOFTWARE. > > + */ > > + > > +#ifndef HW_ICH9_CC_H > > +#define HW_ICH9_CC_H > > + > > +#define RCBA_BASE_ADDR 0xfed1c000 > where does this value come from? > > > +#define RCRB_SIZE 0x00004000 > > + > > +#endif /* HW_ICH9_CC_H */ > > diff --git a/tests/acpi-test-data/q35/DSDT b/tests/acpi-test-data/q35/DSDT > > index > > 4723e5954dccb00995ccaf521b7daf6bf15cf1d4..f3bda7b54ea6d669b1498d9380e7781207fb6e49 > > 100644 > > GIT binary patch > > delta 81 > > zcmexlz1oJ$CDxbTJfnq$UVN}qe1Nm3L3ERjvvW{9N4$rp3y > lP)`>|j(F#wU_n7HzBWz > > > delta 24 > > gcmZ2&^U0daCD > > >