From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair23@gmail.com>
Cc: Deepak Gupta <debug@rivosinc.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org, palmer@dabbelt.com,
Alistair.Francis@wdc.com, bmeng.cn@gmail.com,
liwei1518@gmail.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com, jim.shu@sifive.com,
andy.chiu@sifive.com, kito.cheng@sifive.com
Subject: Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
Date: Tue, 27 Aug 2024 14:29:10 +1000 [thread overview]
Message-ID: <20467a9c-e12d-4d36-9439-4ae27045077e@linaro.org> (raw)
In-Reply-To: <CAKmqyKNN28WeR=UsPjnhFZi+W9imeE6v3tHsX5bj_OwdP7XyiA@mail.gmail.com>
On 8/27/24 14:03, Alistair Francis wrote:
> On Tue, Aug 27, 2024 at 1:58 PM Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> On 8/27/24 13:53, Alistair Francis wrote:
>>> Exposing the *envcfg CSRs to userspace seems tricky as everything is
>>> currently built with the S/M CSRs removed from user builds.
>>
>> It is as simple as moving them out of ifdefs, then initializing them as needed in reset
>> for CONFIG_USER_ONLY. That's what we do for Arm.
>
> Is that really better though?
>
> Then we have these CSRs that are included in the build, so people can
> write code that checks the CSRs, but they are never actually changed.
>
> I guess it simplified the CONFIG_USER_ONLY checks, which is handy and
> your original point. But it seems like it is clunky that we have these
> CSRs that are kind of fake
They're not fake. They're a reflection of how the system-mode kernel configures the
system-mode user environment.
The u[bf]cfien variables introduced in this patch set are an indication of this. Within
this patch set they're always false. But the intent is to implement the (proposed) prctl
syscalls that will set them to true (on hold waiting for kernel abi to land upstream, but
were present in an earlier patch set revision.)
The correct implementation of those syscalls, in my opinion, is to set the corresponding
[ms]envcfg bits. Just as linux-user/aarch64/target_prctl.h does for SVE et al.
r~
next prev parent reply other threads:[~2024-08-27 4:30 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-26 15:29 [PATCH v9 00/17] riscv support for control flow integrity extensions Deepak Gupta
2024-08-26 15:29 ` [PATCH v9 01/17] target/riscv: Add zicfilp extension Deepak Gupta
2024-08-27 2:16 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 02/17] target/riscv: Introduce elp state and enabling controls for zicfilp Deepak Gupta
2024-08-27 2:58 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions Deepak Gupta
2024-08-27 0:33 ` Richard Henderson
2024-08-27 0:52 ` Deepak Gupta
2024-08-27 1:34 ` Richard Henderson
2024-08-27 3:53 ` Alistair Francis
2024-08-27 3:58 ` Richard Henderson
2024-08-27 4:03 ` Alistair Francis
2024-08-27 4:29 ` Richard Henderson [this message]
2024-08-27 5:47 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 04/17] target/riscv: additional code information for sw check Deepak Gupta
2024-08-27 3:55 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 05/17] target/riscv: tracking indirect branches (fcfi) for zicfilp Deepak Gupta
2024-08-27 3:58 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 06/17] target/riscv: zicfilp `lpad` impl and branch tracking Deepak Gupta
2024-08-27 4:14 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 07/17] disas/riscv: enable `lpad` disassembly Deepak Gupta
2024-08-27 4:15 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 08/17] target/riscv: Add zicfiss extension Deepak Gupta
2024-08-27 4:20 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 09/17] target/riscv: introduce ssp and enabling controls for zicfiss Deepak Gupta
2024-08-26 15:29 ` [PATCH v9 10/17] target/riscv: tb flag for shadow stack instructions Deepak Gupta
2024-08-27 5:51 ` Alistair Francis
2024-08-26 15:29 ` [PATCH v9 11/17] target/riscv: mmu changes for zicfiss shadow stack protection Deepak Gupta
2024-08-27 5:59 ` Alistair Francis
2024-08-27 23:06 ` Deepak Gupta
2024-08-26 15:29 ` [PATCH v9 12/17] target/riscv: AMO operations always raise store/AMO fault Deepak Gupta
2024-08-27 0:34 ` Richard Henderson
2024-08-26 15:29 ` [PATCH v9 13/17] target/riscv: update `decode_save_opc` to store extra word2 Deepak Gupta
2024-08-27 0:35 ` Richard Henderson
2024-08-26 15:29 ` [PATCH v9 14/17] target/riscv: implement zicfiss instructions Deepak Gupta
2024-08-26 15:29 ` [PATCH v9 15/17] target/riscv: compressed encodings for sspush and sspopchk Deepak Gupta
2024-08-27 0:37 ` Richard Henderson
2024-08-26 15:29 ` [PATCH v9 16/17] disas/riscv: enable disassembly for zicfiss instructions Deepak Gupta
2024-08-26 15:29 ` [PATCH v9 17/17] disas/riscv: enable disassembly for compressed sspush/sspopchk Deepak Gupta
2024-08-27 2:44 ` [PATCH v9 00/17] riscv support for control flow integrity extensions Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20467a9c-e12d-4d36-9439-4ae27045077e@linaro.org \
--to=richard.henderson@linaro.org \
--cc=Alistair.Francis@wdc.com \
--cc=alistair23@gmail.com \
--cc=andy.chiu@sifive.com \
--cc=bmeng.cn@gmail.com \
--cc=dbarboza@ventanamicro.com \
--cc=debug@rivosinc.com \
--cc=jim.shu@sifive.com \
--cc=kito.cheng@sifive.com \
--cc=liwei1518@gmail.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).