From: Richard Henderson <richard.henderson@linaro.org>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
qemu-devel@nongnu.org
Cc: pburton@wavecomp.com, smarkovic@wavecomp.com,
philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com,
pjovanovic@wavecomp.com, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges
Date: Thu, 5 Jul 2018 08:49:55 -0700 [thread overview]
Message-ID: <20f56ce2-9998-75c1-a15f-80633a70bd5e@linaro.org> (raw)
In-Reply-To: <1530732637-28606-5-git-send-email-aleksandar.markovic@rt-rk.com>
On 07/04/2018 12:30 PM, Aleksandar Markovic wrote:
> case 18:
> switch (sel) {
> - case 0 ... 7:
> + case 0:
> + case 1:
> + case 2:
> + case 3:
> + case 4:
> + case 5:
> + case 6:
> + case 7:
I don't see the point in this. It is clear what 0 ... 7 means.
> - case OPC_MULT ... OPC_DIVU:
> + case OPC_MULT:
> + case OPC_MULTU:
> + case OPC_DIV:
> + case OPC_DIVU:
These on the other hand are a good cleanup, because there's no obvious
relationship between the beginning and end of the range.
r~
next prev parent reply other threads:[~2018-07-05 15:50 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 1/8] target/mips: Update maintainer's email addresses Aleksandar Markovic
2018-07-04 20:09 ` Philippe Mathieu-Daudé
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c Aleksandar Markovic
2018-07-04 20:11 ` Philippe Mathieu-Daudé
2018-07-05 9:59 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions Aleksandar Markovic
2018-07-04 20:16 ` Philippe Mathieu-Daudé
2018-07-05 10:04 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges Aleksandar Markovic
[not found] ` <51b61976-e024-77c4-afa5-b3d55a93bfb5@amsat.org>
2018-07-05 15:23 ` Philippe Mathieu-Daudé
2018-07-05 15:49 ` Richard Henderson [this message]
2018-07-06 9:04 ` Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register Aleksandar Markovic
2018-07-04 20:31 ` Philippe Mathieu-Daudé
2018-07-05 10:08 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
2018-07-05 13:27 ` [Qemu-devel] " Stefan Markovic
[not found] ` <6bed7e02-a3d3-ea93-7291-96799d4d2a83@amsat.org>
2018-07-06 11:40 ` Stefan Markovic
2018-07-06 13:11 ` Richard Henderson
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 6/8] target/mips: Amend CP0 WatchHi register implementation Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 7/8] target/mips: Don't update BadVAddr register in Debug Mode Aleksandar Markovic
2018-07-04 20:34 ` Philippe Mathieu-Daudé
2018-07-05 10:12 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 Aleksandar Markovic
2018-07-06 15:46 ` Aleksandar Markovic
2018-07-04 22:51 ` [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements no-reply
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