From: Paolo Bonzini <pbonzini@redhat.com>
To: tony.nguyen@bt.com, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, walling@linux.ibm.com,
sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com,
mark.cave-ayland@ilande.co.uk, laurent@vivier.eu,
Alistair.Francis@wdc.com, edgar.iglesias@gmail.com,
arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com,
borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com,
ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
stefanha@redhat.com, shorne@gmail.com,
david@gibson.dropbear.id.au, qemu-riscv@nongnu.org,
kbastian@mail.uni-paderborn.de, cohuck@redhat.com,
alex.williamson@redhat.com, qemu-ppc@nongnu.org,
amarkovic@wavecomp.com, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH v5 11/15] memory: Single byte swap along the I/O path
Date: Fri, 26 Jul 2019 11:39:49 +0200 [thread overview]
Message-ID: <2159ad69-4c4c-24dc-6759-039e39f952d3@redhat.com> (raw)
In-Reply-To: <1564123667210.66446@bt.com>
On 26/07/19 08:47, tony.nguyen@bt.com wrote:
> +static bool memory_region_endianness_inverted(MemoryRegion *mr)
> {
> #ifdef TARGET_WORDS_BIGENDIAN
> return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
> @@ -361,23 +361,27 @@ static bool
> memory_region_wrong_endianness(MemoryRegion *mr)
> #endif
> }
>
> -static void adjust_endianness(MemoryRegion *mr, uint64_t *data,
> unsigned size)
> +static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
> {
> - if (memory_region_wrong_endianness(mr)) {
> - switch (size) {
> - case 1:
> + if (memory_region_endianness_inverted(mr)) {
> + op ^= MO_BSWAP;
> + }
Here it should not matter: the caller of memory_region_dispatch_read
should includes one of MO_TE/MO_LE/MO_BE in the op (or nothing for host
endianness). Then memory_region_endianness_inverted can be:
if (mr->ops->endianness == DEVICE_NATIVE_ENDIAN)
return (op & MO_BSWAP) != MO_TE;
else if (mr->ops->endianness == DEVICE_BIG_ENDIAN)
return (op & MO_BSWAP) != MO_BE;
else if (mr->ops->endianness == DEVICE_LITTLE_ENDIAN)
return (op & MO_BSWAP) != MO_LE;
and adjust_endianness does
if (memory_region_endianness_inverted(mr, op)) {
switch (op & MO_SIZE) {
...
}
}
I think the changes should be split in two parts. Before this patch,
you modify all callers of memory_region_dispatch_* so that they already
pass the right endianness op; however, you leave the existing swap in
place. So for example in load_helper you'd have in a previous patch
+ /* FIXME: io_readx ignores MO_BSWAP. */
+ op = SIZE_MEMOP(size) | (big_endian ? MO_BE : MO_LE);
res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
- mmu_idx, addr, retaddr, access_type,
SIZE_MEMOP(size));
+ mmu_idx, addr, retaddr, access_type, op);
return handle_bswap(res, size, big_endian);
Then, in this patch, you remove the handle_bswap call as well as the
FIXME comment.
Paolo
next prev parent reply other threads:[~2019-07-26 9:40 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-26 6:42 [Qemu-devel] [PATCH v5 00/15] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-26 6:43 ` [Qemu-devel] [PATCH v5 01/15] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen
2019-07-26 7:43 ` David Gibson
2019-07-26 13:27 ` Richard Henderson
2019-07-26 6:43 ` [Qemu-devel] [PATCH v5 02/15] memory: Access MemoryRegion with MemOp tony.nguyen
2019-07-26 13:36 ` Richard Henderson
2019-07-26 14:04 ` Richard Henderson
2019-07-26 6:44 ` [Qemu-devel] [PATCH v5 03/15] target/mips: " tony.nguyen
2019-07-26 13:40 ` Richard Henderson
2019-07-26 6:44 ` [Qemu-devel] [PATCH v5 04/15] hw/s390x: " tony.nguyen
2019-07-26 13:42 ` Richard Henderson
2019-07-26 6:45 ` [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: " tony.nguyen
2019-07-26 13:43 ` Richard Henderson
2019-07-26 6:45 ` [Qemu-devel] [PATCH v5 06/15] hw/virtio: " tony.nguyen
2019-07-26 13:43 ` Richard Henderson
2019-07-26 6:46 ` [Qemu-devel] [PATCH v5 07/15] hw/vfio: " tony.nguyen
2019-07-26 13:43 ` Richard Henderson
2019-07-26 6:46 ` [Qemu-devel] [PATCH v5 08/15] exec: " tony.nguyen
2019-07-26 13:46 ` Richard Henderson
2019-07-26 6:46 ` [Qemu-devel] [PATCH v5 09/15] cputlb: " tony.nguyen
2019-07-26 11:03 ` Philippe Mathieu-Daudé
2019-07-26 11:16 ` [Qemu-devel] [EXTERNAL]Re: " Aleksandar Markovic
2019-07-26 11:23 ` Aleksandar Markovic
2019-07-26 14:14 ` [Qemu-devel] " Richard Henderson
2019-07-26 6:47 ` [Qemu-devel] [PATCH v5 10/15] memory: Access MemoryRegion with MemOp semantics tony.nguyen
2019-07-26 14:24 ` Richard Henderson
2019-07-26 6:47 ` [Qemu-devel] [PATCH v5 11/15] memory: Single byte swap along the I/O path tony.nguyen
2019-07-26 9:26 ` Paolo Bonzini
2019-07-26 14:29 ` Richard Henderson
2019-07-26 9:39 ` Paolo Bonzini [this message]
2019-07-26 14:45 ` Richard Henderson
2019-07-26 6:48 ` [Qemu-devel] [PATCH v5 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-07-26 14:48 ` Richard Henderson
2019-07-26 6:48 ` [Qemu-devel] [PATCH v5 13/15] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-07-26 14:52 ` Richard Henderson
2019-07-26 6:48 ` [Qemu-devel] [PATCH v5 14/15] target/sparc: Add TLB entry with attributes tony.nguyen
2019-07-26 14:55 ` Richard Henderson
2019-07-26 6:49 ` [Qemu-devel] [PATCH v5 15/15] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
2019-07-26 14:56 ` Richard Henderson
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