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[83.21.151.197]) by smtp.gmail.com with ESMTPSA id d26-20020ac2545a000000b004efe73ee01fsm5119878lfn.306.2023.07.04.08.00.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Jul 2023 08:00:10 -0700 (PDT) Message-ID: <2182ab07-ca32-22ae-8c5a-5d23bfcec5cb@linaro.org> Date: Tue, 4 Jul 2023 17:00:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH 0/2] target/arm: Implement Cortex Neoverse-V1 Content-Language: pl-PL, en-GB, en-HK To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20230704130647.2842917-1-peter.maydell@linaro.org> <81e6bf97-b6c6-e09d-51b5-445bdc3a47bb@linaro.org> <488ca2a9-8e1a-3a62-8487-fefaed69ca8b@linaro.org> From: Marcin Juszkiewicz Organization: Linaro In-Reply-To: <488ca2a9-8e1a-3a62-8487-fefaed69ca8b@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=marcin.juszkiewicz@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.09, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org W dniu 4.07.2023 o 16:54, Philippe Mathieu-Daudé pisze: > On 4/7/23 15:35, Marcin Juszkiewicz wrote: >> W dniu 4.07.2023 o 15:06, Peter Maydell pisze: >> >>> This patchset implements the Cortex Neoverse-V1 CPU type, as a >>> representative Armv8.3 (+ some extras from 8.4) CPU matching real >>> hardware.  The main thing we were waiting for to be able to define >>> this was FEAT_LSE2, and that is now supported. >> >> Now I can add "reach SBSA level 4" to todo list as it requires v8.3 >> cpu (I do not count 'max' cpu type). > > Do we need to introduce machine variants, such sbsa-lvl3-ref and > sbsa-lvl4-ref? Or simply sbsa-level3/sbsa-level4? No such combinations. The plan for sbsa-ref is to have only one platform. Version of platform is exported in DeviceTree already. TF-A reads it and exports via SMC call to EDK2. What changes between versions is present in documentation.