From: miaoyubo <miaoyubo@huawei.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: "peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"berrange@redhat.com" <berrange@redhat.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Xiexiangyou <xiexiangyou@huawei.com>,
"shannon.zhaosl@gmail.com" <shannon.zhaosl@gmail.com>,
"imammedo@redhat.com" <imammedo@redhat.com>,
"lersek@redhat.com" <lersek@redhat.com>
Subject: RE: [PATCH v6 4/8] acpi: Refactor the source of host bridge and build tables for pxb
Date: Fri, 8 May 2020 13:12:36 +0000 [thread overview]
Message-ID: <21a5fb02602242d0ade3cf3621a44b59@huawei.com> (raw)
In-Reply-To: <20200504095329-mutt-send-email-mst@kernel.org>
Thanks so much for such a careful review!!
> -----Original Message-----
> From: Michael S. Tsirkin [mailto:mst@redhat.com]
> Sent: Monday, May 4, 2020 10:01 PM
> To: miaoyubo <miaoyubo@huawei.com>
> Cc: peter.maydell@linaro.org; shannon.zhaosl@gmail.com;
> lersek@redhat.com; imammedo@redhat.com; qemu-devel@nongnu.org;
> berrange@redhat.com; Xiexiangyou <xiexiangyou@huawei.com>
> Subject: Re: [PATCH v6 4/8] acpi: Refactor the source of host bridge and build
> tables for pxb
>
> On Wed, Apr 08, 2020 at 08:58:12PM +0800, Yubo Miao wrote:
> > From: miaoyubo <miaoyubo@huawei.com>
> >
> > The resources of pxbs and obtained by crs_build and the resources used
> > by pxbs would be moved form the resources defined for host-bridge.
> >
> > The resources for pxb are composed of the bar space of the
> > pci-bridge/pcie-root-port behined it and the config space of devices
> > behind it.
> >
> > Signed-off-by: miaoyubo <miaoyubo@huawei.com>
>
> A bunch of spelling/syntax mistakes in the log, pls spellcheck.
>
> Pls use the format
> Yubo Miao <miaoyubo@huawei.com>
>
>
>
Thanks for pointing out the mistakes!
> > ---
> > hw/arm/virt-acpi-build.c | 131
> > +++++++++++++++++++++++++++++++++------
> > 1 file changed, 111 insertions(+), 20 deletions(-)
> >
> > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index
> > e8ba09855c..7bcd04dfb7 100644
> > --- a/hw/arm/virt-acpi-build.c
> > +++ b/hw/arm/virt-acpi-build.c
> > @@ -49,6 +49,9 @@
> > #include "kvm_arm.h"
> > #include "migration/vmstate.h"
> >
> > +#include "hw/arm/virt.h"
> > +#include "hw/pci/pci_bus.h"
> > +#include "hw/pci/pci_bridge.h"
> > #define ARM_SPI_BASE 32
> >
> > static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus) @@ -266,19
> > +269,81 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, Aml *scope) }
> >
> > static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry
> *memmap,
> > - uint32_t irq, bool use_highmem, bool highmem_ecam)
> > + uint32_t irq, bool use_highmem, bool highmem_ecam,
> > + VirtMachineState *vms)
> > {
> > int ecam_id = VIRT_ECAM_ID(highmem_ecam);
> > - Aml *method, *crs;
> > + int i;
> > + Aml *method, *crs, *dev;
> > hwaddr base_mmio = memmap[VIRT_PCIE_MMIO].base;
> > hwaddr size_mmio = memmap[VIRT_PCIE_MMIO].size;
> > hwaddr base_pio = memmap[VIRT_PCIE_PIO].base;
> > hwaddr size_pio = memmap[VIRT_PCIE_PIO].size;
> > hwaddr base_ecam = memmap[ecam_id].base;
> > hwaddr size_ecam = memmap[ecam_id].size;
> > + CrsRangeEntry *entry;
> > + CrsRangeSet crs_range_set;
> > +
> > + crs_range_set_init(&crs_range_set);
> > int nr_pcie_buses = size_ecam / PCIE_MMCFG_SIZE_MIN;
> > + PCIHostState *s = OBJECT_CHECK(PCIHostState,
> > + object_resolve_path_type("",
> > + "pcie-host-bridge", NULL),
> > + TYPE_PCI_HOST_BRIDGE);
>
> Not TYPE_PCIE_HOST_BRIDGE? And what if it's ambiguous?
>
>
Yes, TYPE_PCI_HOST_BRIDGE is ambiguous, I would fix it.
> > +
> > + PCIBus *bus = s->bus;
> > + /* start to construct the tables for pxb*/
>
>
> coding style violation. weird that ehckpatch didn't notice it.
>
Thanks for such a careful review!
> > + if (bus) {
> > + QLIST_FOREACH(bus, &bus->child, sibling) {
> > + uint8_t bus_num = pci_bus_num(bus);
> > + uint8_t numa_node = pci_bus_numa_node(bus);
> > +
> > + if (!pci_bus_is_root(bus)) {
> > + continue;
> > + }
> > + /*
> > + * Coded up the MIN of the busNr defined for pxb-pcie,
> > + * the MIN - 1 would be the MAX bus number for the main
> > + * host bridge.
>
>
> Couldn't figure out this comment. Pls rephrase in some way so it's
> understandable.
>
How about
/* 0 - (nr_pcie_buses - 1) is the bus range for the main
* host-bridge and it equals the MIN of the
* busNr defined for pxb-pcie*/
> > + */
> > + if (bus_num < nr_pcie_buses) {
> > + nr_pcie_buses = bus_num;
> > + }
> > +
> > + }
> > +
> > + acpi_dsdt_add_pci_route_table(dev, scope, irq);
> > +
> > + /*
> > + * Resources deined for PXBs are composed by the folling parts:
> > + * 1. The resources the pci-brige/pcie-root-port need.
> > + * 2. The resources the devices behind pxb need.
> > + */
>
>
> syntax/grammar errors here too.
>
Sorry for the syntax error!
> > + crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent),
> &crs_range_set);
> > + aml_append(dev, aml_name_decl("_CRS", crs));
> > +
> > + acpi_dsdt_add_pci_osc(dev, scope);
> > +
> > + aml_append(scope, dev);
> > +
> > + }
> > + }
> >
> > - Aml *dev = aml_device("%s", "PCI0");
> > + /* start to construct the tables for main host bridge */
>
> tables for the main.
>
>
Yes, tables for the main is better.
>
> > + dev = aml_device("%s", "PCI0");
>
>
> Make dev above local in scope, then this can stay unchanged.
>
Sure.
> > aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A08")));
> > aml_append(dev, aml_name_decl("_CID", aml_string("PNP0A03")));
> > aml_append(dev, aml_name_decl("_SEG", aml_int(0))); @@ -299,25
> > +364,51 @@ static void acpi_dsdt_add_pci(Aml *scope, const
> MemMapEntry *memmap,
> > aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED,
> AML_POS_DECODE,
> > 0x0000, 0x0000, nr_pcie_buses - 1, 0x0000,
> > nr_pcie_buses));
> > - aml_append(rbuf,
> > - aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
> AML_MAX_FIXED,
> > unsigned dsdt, xsdt;
> > GArray *tables_blob = tables->table_data;
> > MachineState *ms = MACHINE(vms);
> > -
> > table_offsets = g_array_new(false, true /* clear */,
> > sizeof(uint32_t));
> >
>
> this empty line didn't hurt
>
I would keep it.
> > @@ -952,7 +1044,6 @@ void virt_acpi_setup(VirtMachineState *vms)
> > build_state->rsdp_mr = acpi_add_rom_blob(virt_acpi_build_update,
> > build_state, tables.rsdp,
> > ACPI_BUILD_RSDP_FILE,
> > 0);
> > -
> > qemu_register_reset(virt_acpi_build_reset, build_state);
> > virt_acpi_build_reset(build_state);
> > vmstate_register(NULL, 0, &vmstate_virt_acpi_build, build_state);
>
>
> this line didn't hurt either.
>
I would keep it
> > --
> > 2.19.1
> >
Regards,
Miao
next prev parent reply other threads:[~2020-05-08 13:13 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-08 12:58 [PATCH v6 0/8] pci_expander_brdige:acpi:Support pxb-pcie for ARM Yubo Miao
2020-04-08 12:58 ` [PATCH v6 1/8] acpi: Extract two APIs from acpi_dsdt_add_pci Yubo Miao
2020-04-08 12:58 ` [PATCH v6 2/8] fw_cfg: Write the extra roots into the fw_cfg Yubo Miao
2020-05-04 14:02 ` Michael S. Tsirkin
2020-05-08 12:50 ` miaoyubo
2020-04-08 12:58 ` [PATCH v6 3/8] acpi: Extract crs build form acpi_build.c Yubo Miao
2020-04-08 12:58 ` [PATCH v6 4/8] acpi: Refactor the source of host bridge and build tables for pxb Yubo Miao
2020-05-04 14:00 ` Michael S. Tsirkin
2020-05-08 13:12 ` miaoyubo [this message]
2020-04-08 12:58 ` [PATCH v6 5/8] acpi: Align the size to 128k Yubo Miao
2020-05-04 14:03 ` Michael S. Tsirkin
2020-05-08 13:17 ` miaoyubo
2020-04-08 12:58 ` [PATCH v6 6/8] unit-test: The files changed Yubo Miao
2020-04-08 12:58 ` [PATCH v6 7/8] unit-test: Add testcase for pxb Yubo Miao
2020-04-08 12:58 ` [PATCH v6 8/8] unit-test: Add the binary file and clear diff.h Yubo Miao
2020-04-08 13:11 ` [PATCH v6 0/8] pci_expander_brdige:acpi:Support pxb-pcie for ARM no-reply
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