From: "Sorav Bansal" <sbansal@cs.stanford.edu>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] target-ppc specification question
Date: Tue, 15 May 2007 18:28:03 -0700 [thread overview]
Message-ID: <21dbb7da0705151828m1d679f8eqa88ded682d9999e0@mail.gmail.com> (raw)
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Dear qemu-devs,
Two questions about what seems to be a deviation in the qemu-implementation
from PowerPC specification:
1. In comparison operations (eg. PPC_OP(cmp)), why does qemu not set the SO
bit (which will be the fourth bit) of T0? The spec says that the xer_so bit
is copied into the fourth bit of the CRF register.
2. In set_Rc0 operations (eg. PPC_OP(set_Rc0)), why is xer_ov used instead
of xer_so? The spec says that a copy of xer_so is used.
I am using the powerpc manual as the specification document available here:
www.xilinx.com/bvdocs/userguides/ppc_ref_guide.pdf.
I am looking at page 101, Table 3-34 for question 1; page 64, Table 3-2 for
question 2.
Regards,
Sorav
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reply other threads:[~2007-05-16 1:36 UTC|newest]
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