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Date: Tue, 15 May 2007 18:28:03 -0700
From: "Sorav Bansal" <sbansal@cs.stanford.edu>
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Subject: [Qemu-devel] target-ppc specification question
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Dear qemu-devs,

Two questions about what seems to be a deviation in the qemu-implementation
from PowerPC specification:

1. In comparison operations (eg. PPC_OP(cmp)), why does qemu not set the SO
bit (which will be the fourth bit) of T0? The spec says that the xer_so bit
is copied into the fourth bit of the CRF register.

2. In set_Rc0 operations (eg. PPC_OP(set_Rc0)), why is xer_ov used instead
of xer_so? The spec says that a copy of xer_so is used.

I am using the powerpc manual as the specification document available here:
www.xilinx.com/bvdocs/userguides/ppc_ref_guide.pdf.

I am looking at page 101, Table 3-34 for question 1; page 64, Table 3-2 for
question 2.

Regards,
Sorav

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Dear qemu-devs,<br><br>Two questions about what seems to be a deviation in the qemu-implementation from PowerPC specification:<br><br>1. In comparison operations (eg. PPC_OP(cmp)), why does qemu not set the SO bit (which will be the fourth bit) of T0? The spec says that the xer_so bit is copied into the fourth bit of the CRF register.
<br><br>2. In set_Rc0 operations (eg. PPC_OP(set_Rc0)), why is xer_ov used instead of xer_so? The spec says that a copy of xer_so is used.<br><br>I am using the powerpc manual as the specification document available here: 
<font size="-1"><span class="a"><a href="http://www.xilinx.com/bvdocs/userguides/ppc_ref_guide.pdf">www.xilinx.com/bvdocs/userguides/ppc_ref_guide.pdf</a></span></font>.<br><br>I am looking at page 101, Table 3-34 for question 1; page 64, Table 3-2 for question 2.
<br><br>Regards,<br>Sorav<br>

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