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From: Rashmica Gupta <rashmica.g@gmail.com>
To: "Víctor Colombo" <victor.colombo@eldorado.org.br>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au,
	 groug@kaod.org, richard.henderson@linaro.org
Subject: Re: [PATCH v2 3/3] target/ppc: Rename sfprf to sfifprf where it's also used as set fi flag
Date: Wed, 11 May 2022 20:12:34 +1000	[thread overview]
Message-ID: <2257b48007dc62d21140bf7c1a5859823fe4dfa5.camel@gmail.com> (raw)
In-Reply-To: <20220510204610.100867-4-victor.colombo@eldorado.org.br>

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On Tue, 2022-05-10 at 17:46 -0300, Víctor Colombo wrote:
> The bit FI fix used the sfprf flag as a flag for the set_fi parameter
> in do_float_check_status where applicable. Now, this patch rename
> this
> flag to sfifprf to state this dual usage.
> 
> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
> 
> ---
> 
> v2: Add this patch
> ---
>  target/ppc/fpu_helper.c | 112 ++++++++++++++++++++------------------
> --
>  1 file changed, 56 insertions(+), 56 deletions(-)
> 
> diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
> index 88f9e756a5..7209150d1a 100644
> --- a/target/ppc/fpu_helper.c
> +++ b/target/ppc/fpu_helper.c
> @@ -1693,9 +1693,9 @@ uint32_t helper_efdcmpeq(CPUPPCState *env,
> uint64_t op1, uint64_t op2)
>   *   nels  - number of elements (1, 2 or 4)
>   *   tp    - type (float32 or float64)
>   *   fld   - vsr_t field (VsrD(*) or VsrW(*))
> - *   sfprf - set FPRF
> + *   sfifprf - set FI and FPRF
>   */
> -#define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf,
> r2sp)                    \
> +#define VSX_ADD_SUB(name, op, nels, tp, fld, sfifprf,
> r2sp)                  \
>  void helper_##name(CPUPPCState *env, ppc_vsr_t
> *xt,                          \
>                     ppc_vsr_t *xa, ppc_vsr_t
> *xb)                             \
>  {                                                                   
>          \
...                                                     \
> @@ -2767,9 +2767,9 @@ VSX_CVT_FP_TO_FP_VECTOR(xscvdpqp, 1, float64,
> float128, VsrD(0), f128, 1)
>   *   ttp   - target type
>   *   sfld  - source vsr_t field
>   *   tfld  - target vsr_t field
> - *   sfprf - set FPRF
> + *   sfifprf - set FPRF

set FI and FPRF?

otherwise, Reviewed-by: Rashmica Gupta <rashmica.g@gmail.com>

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      parent reply	other threads:[~2022-05-11 10:19 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 20:46 [PATCH v2 0/3] target/ppc: Fix FPSCR.FI bit Víctor Colombo
2022-05-10 20:46 ` [PATCH v2 1/3] target/ppc: Fix FPSCR.FI bit being cleared when it shouldn't Víctor Colombo
2022-05-10 23:56   ` Richard Henderson
2022-05-11 10:12   ` Rashmica Gupta
2022-05-11 18:29     ` Víctor Colombo
2022-05-10 20:46 ` [PATCH v2 2/3] target/ppc: Fix FPSCR.FI changing in float_overflow_excp() Víctor Colombo
2022-05-10 23:58   ` Richard Henderson
2022-05-11 10:12   ` Rashmica Gupta
2022-05-10 20:46 ` [PATCH v2 3/3] target/ppc: Rename sfprf to sfifprf where it's also used as set fi flag Víctor Colombo
2022-05-10 23:58   ` Richard Henderson
2022-05-11 10:12   ` Rashmica Gupta [this message]

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