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Tue, 05 Nov 2024 06:27:24 -0800 (PST) Message-ID: <23534a10-ea21-47ee-b31f-0ce9185e6545@linaro.org> Date: Tue, 5 Nov 2024 14:27:20 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/5] target/loongarch/tcg: Add hardware page table walker support To: Song Gao , qemu-devel@nongnu.org Cc: maobibo@loongson.cn, philmd@linaro.org References: <20241010063536.2276871-1-gaosong@loongson.cn> <20241010063536.2276871-6-gaosong@loongson.cn> Content-Language: en-US From: Richard Henderson In-Reply-To: <20241010063536.2276871-6-gaosong@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/10/24 07:35, Song Gao wrote: > + base = get_pte_base(env, address); > + > + /* 0:64bit, 1:128bit, 2:192bit, 3:256bit */ > + shift = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTEWIDTH); > + shift = (shift + 1) * 3; > + ptindex = (address >> ptbase) & ((1 << ptwidth) -1); > + ptoffset = ptindex << shift; > + tmp0 = base | ptoffset; This is a guest virtual address. > + retry: > + old_val = ldq_phys(cs->as, tmp0) & TARGET_PHYS_MASK; Fine. > + if (old_val != new_val) { > + cur_val = qatomic_cmpxchg((uint64_t *)tmp0, old_val, new_val); This uses a host address. The cast, and the resulting reference, are incorrect. This is why Arm and x86 structure things differently, using a different tlb index to resolve the host address. This allows the result to be cached like any other address resolution. Riscv does something a bit simpler, using address_space_translate to resolve the host address. Most of the rest of this patch set is going to need review from loongson employees, since I've not seen public documentation in english for this feature. r~