From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38788) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d2ZIy-0005Gk-7w for qemu-devel@nongnu.org; Mon, 24 Apr 2017 04:25:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d2ZIu-0004XO-67 for qemu-devel@nongnu.org; Mon, 24 Apr 2017 04:25:08 -0400 Received: from mx2.suse.de ([195.135.220.15]:48908 helo=mx1.suse.de) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d2ZIt-0004XB-VG for qemu-devel@nongnu.org; Mon, 24 Apr 2017 04:25:04 -0400 References: <20170423223216.17856-1-aurelien@aurel32.net> From: Alexander Graf Message-ID: <23a3da7d-d330-7cad-5bef-8e80c8d9f50c@suse.de> Date: Mon, 24 Apr 2017 10:25:00 +0200 MIME-Version: 1.0 In-Reply-To: <20170423223216.17856-1-aurelien@aurel32.net> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , qemu-devel@nongnu.org Cc: Richard Henderson , Philipp Kern On 24.04.17 00:32, Aurelien Jarno wrote: > From: Philipp Kern > > According to "CPU Signaling and Response", "Signal-Processor Orders", > the order field is bit position 56-63. Without this, the Linux > guest kernel is sometimes unable to stop emulation and enters > an infinite loop of "XXX unknown sigp: 0xffffffff00000005". > > Signed-off-by: Philipp Kern > Signed-off-by: Aurelien Jarno > --- > target/s390x/misc_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > This patch has been sent by Philipp Kern a lot of time ago, and it seems > has been lost. I am resending it, as it is still useful. > > diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c > index 3bf09ea222..4946b56ab3 100644 > --- a/target/s390x/misc_helper.c > +++ b/target/s390x/misc_helper.c > @@ -534,7 +534,7 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1, > /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register" > as parameter (input). Status (output) is always R1. */ > > - switch (order_code) { > + switch (order_code & 0xff) { This definitely needs a comment above the mask. Ideally I'd love to just change the function prototype to pass order_code as uint8_t, but I don't think that's possible with the TCG glue. Alex