Re: [PATCH] target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts

["Cédric Le Goater" <clegoate@redhat.com>]

On 6/20/23 15:13, Nicholas Piggin wrote:
> System call interrupts in ISA v3.1 CPUs add a LEV indication in SRR1
> that corresponds with the LEV field of the instruction that caused the
> interrupt.
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>


Applied to ppc-next.

Thanks,

C.



> ---
> This is unchanged, just taken out of the bigger series since it is
> independent.
> 
> Thanks,
> Nick
> 
>   target/ppc/excp_helper.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 77bfc18734..c7550fea13 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -1591,6 +1591,10 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
>               vhc->hypercall(cpu->vhyp, cpu);
>               return;
>           }
> +        if (env->insns_flags2 & PPC2_ISA310) {
> +            /* ISAv3.1 puts LEV into SRR1 */
> +            msr |= lev << 20;
> +        }
>           if (lev == 1) {
>               new_msr |= (target_ulong)MSR_HVB;
>           }