qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Cédric Le Goater" <clg@kaod.org>
To: Joe Komlodi <komlodi@google.com>, qemu-devel@nongnu.org
Cc: venture@google.com, peter.maydell@linaro.org,
	steven_lee@aspeedtech.com, leetroy@gmail.com,
	jamin_lin@aspeedtech.com, andrew@codeconstruct.com.au,
	joel@jms.id.au, qemu-arm@nongnu.org,
	Jeremy Kerr <jk@codeconstruct.com.au>
Subject: Re: [PATCH 00/19] i3c: aspeed: Add I3C support
Date: Mon, 16 Jun 2025 08:49:36 +0200	[thread overview]
Message-ID: <23deafc7-d832-470b-8d8e-aea0125d756f@kaod.org> (raw)
In-Reply-To: <20250613000411.1516521-1-komlodi@google.com>

Hi

+ Jeremy

On 6/13/25 02:03, Joe Komlodi wrote:
> Hi all,
> 
> This series adds I3C bus support to QEMU and adds more functionality to the
> Aspeed I3C controller.
> 
> This implementation is a basic implementation that introduces IBIs
> (including hot-join), CCCs, and SDR data transfer. As-is, it doesn't support
> multi-controller buses or HDR transfers.
> 
> First we add the I3C bus and controller model. With that added we extend
> the functionality of the Aspeed I3C controller so it can do transfers
> and handle IBIs.
> 
> Next, we add a mock I3C target. It's intended to be a very simple target
> just to verify that I3C is working on the guest. Internally, we've used it
> on Linux to verify that i3C devices can be probed and can send/receive data
> and IBIs.
> This target is sort of like an EEPROM, and it can also send IBIs upon
> reception of a user-defined magic number.> 
> Lastly we add  hotplugging support. The hotplugging doesn't do anything too
> complicated, it just adds the device attempting to hotplug to the bus. It
> is the device's responsibility to hot-join and go through the DAA process
> to participate on the bus.
> 
> Thanks,
> Joe
> 
> Joe Komlodi (19):
>    hw/misc/aspeed_i3c: Move to i3c directory
>    hw/i3c: Add bus support
>    hw/i3c: Split DesignWare I3C out of Aspeed I3C
>    hw/i3c/dw-i3c: Add more register fields
>    hw/i3c/aspeed_i3c: Add more register fields
>    hw/i3c/dw-i3c: Add more reset values
>    hw/i3c/aspeed_i3c: Add register RO field masks
>    hw/i3c/dw-i3c: Add register RO field masks
>    hw/i3c/dw-i3c: Treat more registers as read-as-zero
>    hw/i3c/dw-i3c: Use 32 bits on MMIO writes
>    hw/i3c/dw-i3c: Add IRQ MMIO behavior
>    hw/i3c/dw-i3c: Add data TX and RX
>    hw/i3c/dw-i3c: Add IBI handling
>    hw/i3c/dw-i3c: Add ctrl MMIO handling
>    hw/i3c/dw-i3c: Add controller resets
>    hw/i3c/aspeed: Add I3C bus get function
>    hw/i3c: Add Mock target
>    hw/arm/aspeed: Build with I3C_DEVICES
>    hw/i3c: Add hotplug support
> 
>   hw/Kconfig                            |    1 +
>   hw/arm/Kconfig                        |    3 +
>   hw/i3c/Kconfig                        |   15 +
>   hw/i3c/aspeed_i3c.c                   |  261 ++++
>   hw/i3c/core.c                         |  669 +++++++++
>   hw/i3c/dw-i3c.c                       | 1881 +++++++++++++++++++++++++
>   hw/i3c/meson.build                    |    6 +
>   hw/i3c/mock-i3c-target.c              |  311 ++++
>   hw/i3c/trace-events                   |   47 +
>   hw/i3c/trace.h                        |    2 +
>   hw/meson.build                        |    1 +
>   hw/misc/aspeed_i3c.c                  |  383 -----
>   hw/misc/meson.build                   |    1 -
>   hw/misc/trace-events                  |    6 -
>   include/hw/arm/aspeed_soc.h           |    2 +-
>   include/hw/{misc => i3c}/aspeed_i3c.h |   22 +-
>   include/hw/i3c/dw-i3c.h               |  201 +++
>   include/hw/i3c/i3c.h                  |  277 ++++
>   include/hw/i3c/mock-i3c-target.h      |   52 +
>   meson.build                           |    1 +
>   20 files changed, 3735 insertions(+), 407 deletions(-)
>   create mode 100644 hw/i3c/Kconfig
>   create mode 100644 hw/i3c/aspeed_i3c.c
>   create mode 100644 hw/i3c/core.c
>   create mode 100644 hw/i3c/dw-i3c.c
>   create mode 100644 hw/i3c/meson.build
>   create mode 100644 hw/i3c/mock-i3c-target.c
>   create mode 100644 hw/i3c/trace-events
>   create mode 100644 hw/i3c/trace.h
>   delete mode 100644 hw/misc/aspeed_i3c.c
>   rename include/hw/{misc => i3c}/aspeed_i3c.h (63%)
>   create mode 100644 include/hw/i3c/dw-i3c.h
>   create mode 100644 include/hw/i3c/i3c.h
>   create mode 100644 include/hw/i3c/mock-i3c-target.h
> 

This lacks a MAINTAINER.

Could you please provide functional tests ? some with a standard I2C
device attached to an I3C legacy bus too.

Are there any other stakeholders interested in the I3C to get feedback ?

Have there been any changes since:

   https://lore.kernel.org/qemu-devel/20230331010131.1412571-1-komlodi@google.com/

Thanks,

C.


  parent reply	other threads:[~2025-06-16  6:52 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-13  0:03 [PATCH 00/19] i3c: aspeed: Add I3C support Joe Komlodi
2025-06-13  0:03 ` [PATCH 01/19] hw/misc/aspeed_i3c: Move to i3c directory Joe Komlodi
2025-06-16  6:42   ` Cédric Le Goater
2025-06-18  1:25     ` Joe Komlodi
2025-06-13  0:03 ` [PATCH 02/19] hw/i3c: Add bus support Joe Komlodi
2025-06-13  0:03 ` [PATCH 03/19] hw/i3c: Split DesignWare I3C out of Aspeed I3C Joe Komlodi
2025-06-13  0:03 ` [PATCH 04/19] hw/i3c/dw-i3c: Add more register fields Joe Komlodi
2025-06-13  0:03 ` [PATCH 05/19] hw/i3c/aspeed_i3c: " Joe Komlodi
2025-06-13  0:03 ` [PATCH 06/19] hw/i3c/dw-i3c: Add more reset values Joe Komlodi
2025-06-13  0:03 ` [PATCH 07/19] hw/i3c/aspeed_i3c: Add register RO field masks Joe Komlodi
2025-06-13  0:04 ` [PATCH 08/19] hw/i3c/dw-i3c: " Joe Komlodi
2025-06-13  0:04 ` [PATCH 09/19] hw/i3c/dw-i3c: Treat more registers as read-as-zero Joe Komlodi
2025-06-13  0:04 ` [PATCH 10/19] hw/i3c/dw-i3c: Use 32 bits on MMIO writes Joe Komlodi
2025-06-13  0:04 ` [PATCH 11/19] hw/i3c/dw-i3c: Add IRQ MMIO behavior Joe Komlodi
2025-06-13  0:04 ` [PATCH 12/19] hw/i3c/dw-i3c: Add data TX and RX Joe Komlodi
2025-06-13  0:04 ` [PATCH 13/19] hw/i3c/dw-i3c: Add IBI handling Joe Komlodi
2025-06-13  0:04 ` [PATCH 14/19] hw/i3c/dw-i3c: Add ctrl MMIO handling Joe Komlodi
2025-06-13  0:04 ` [PATCH 15/19] hw/i3c/dw-i3c: Add controller resets Joe Komlodi
2025-06-13  0:04 ` [PATCH 16/19] hw/i3c/aspeed: Add I3C bus get function Joe Komlodi
2025-06-13  0:04 ` [PATCH 17/19] hw/i3c: Add Mock target Joe Komlodi
2025-06-13  0:04 ` [PATCH 18/19] hw/arm/aspeed: Build with I3C_DEVICES Joe Komlodi
2025-06-13  0:04 ` [PATCH 19/19] hw/i3c: Add hotplug support Joe Komlodi
2025-06-16  6:49 ` Cédric Le Goater [this message]
2025-06-18  1:25   ` [PATCH 00/19] i3c: aspeed: Add I3C support Joe Komlodi
2025-06-18 12:56     ` Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=23deafc7-d832-470b-8d8e-aea0125d756f@kaod.org \
    --to=clg@kaod.org \
    --cc=andrew@codeconstruct.com.au \
    --cc=jamin_lin@aspeedtech.com \
    --cc=jk@codeconstruct.com.au \
    --cc=joel@jms.id.au \
    --cc=komlodi@google.com \
    --cc=leetroy@gmail.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=steven_lee@aspeedtech.com \
    --cc=venture@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).