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Mon, 18 Oct 2021 11:42:00 -0700 (PDT) Subject: Re: [PULL 00/17] MIPS patches for 2021-10-18 To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org References: <20211017225245.2618892-1-f4bug@amsat.org> From: Richard Henderson Message-ID: <23ffd3b9-4210-33f5-cada-b1dafe4c838e@linaro.org> Date: Mon, 18 Oct 2021 11:41:59 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211017225245.2618892-1-f4bug@amsat.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , Paul Burton Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/17/21 3:52 PM, Philippe Mathieu-Daudé wrote: > The following changes since commit c148a0572130ff485cd2249fbdd1a3260d5e10a4: > > Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211016' into staging (2021-10-16 11:16:28 -0700) > > are available in the Git repository at: > > https://github.com/philmd/qemu.git tags/mips-20211018 > > for you to fetch changes up to 2792cf20ca7eed0e354a0ed731422411faca4908: > > via-ide: Avoid using isa_get_irq() (2021-10-18 00:41:36 +0200) > > ---------------------------------------------------------------- > MIPS patches queue > > Hardware emulation: > - Generate FDT blob for Boston machine (Jiaxun) > - VIA chipset cleanups (Zoltan) > > TCG: > - Use tcg_constant() in Compact branch and MSA opcodes > - Restrict nanoMIPS DSP MULT[U] opcode accumulator to Rel6 > - Fix DEXTRV_S.H DSP opcode > - Remove unused TCG temporary for some DSP opcodes > > ---------------------------------------------------------------- > > BALATON Zoltan (4): > via-ide: Set user_creatable to false > vt82c686: Move common code to via_isa_realize > vt82c686: Add a method to VIA_ISA to raise ISA interrupts > via-ide: Avoid using isa_get_irq() > > Jiaxun Yang (3): > hw/mips/boston: Massage memory map information > hw/mips/boston: Allow loading elf kernel and dtb > hw/mips/boston: Add FDT generator > > Philippe Mathieu-Daudé (10): > target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6 > target/mips: Remove unused register from MSA 2R/2RF instruction format > target/mips: Use tcg_constant_i32() in gen_msa_elm_df() > target/mips: Use tcg_constant_i32() in gen_msa_2rf() > target/mips: Use tcg_constant_i32() in gen_msa_2r() > target/mips: Use tcg_constant_i32() in gen_msa_3rf() > target/mips: Use explicit extract32() calls in gen_msa_i5() > target/mips: Use tcg_constant_tl() in gen_compute_compact_branch() > target/mips: Fix DEXTRV_S.H DSP opcode > target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn() > > include/hw/isa/vt82c686.h | 4 + > hw/ide/via.c | 7 +- > hw/isa/vt82c686.c | 75 +++-- > hw/mips/boston.c | 371 +++++++++++++++++++++-- > target/mips/tcg/msa_translate.c | 51 ++-- > target/mips/tcg/translate.c | 11 +- > target/mips/tcg/nanomips_translate.c.inc | 6 + > 7 files changed, 415 insertions(+), 110 deletions(-) Applied, thanks. r~