From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: "Cédric Le Goater" <clg@kaod.org>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, BALATON Zoltan <balaton@eik.bme.hu>
Subject: Re: [PATCH 11/19] ppc/ppc405: QOM'ify DMA
Date: Wed, 3 Aug 2022 06:25:27 -0300 [thread overview]
Message-ID: <24245f01-1507-0e67-5118-800cb19228f1@gmail.com> (raw)
In-Reply-To: <20220801131039.1693913-12-clg@kaod.org>
On 8/1/22 10:10, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> hw/ppc/ppc405.h | 23 +++++++++++++
> hw/ppc/ppc405_uc.c | 80 +++++++++++++++++++++++++++++-----------------
> 2 files changed, 73 insertions(+), 30 deletions(-)
>
> diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
> index 46366c3b8a19..bd662b2444ff 100644
> --- a/hw/ppc/ppc405.h
> +++ b/hw/ppc/ppc405.h
> @@ -65,6 +65,28 @@ struct ppc4xx_bd_info_t {
>
> typedef struct Ppc405SoCState Ppc405SoCState;
>
> +
> +
> +/* DMA controller */
> +#define TYPE_PPC405_DMA "ppc405-dma"
> +OBJECT_DECLARE_SIMPLE_TYPE(Ppc405DmaState, PPC405_DMA);
> +struct Ppc405DmaState {
> + SysBusDevice parent_obj;
> +
> + PowerPCCPU *cpu;
> +
> + qemu_irq irqs[4];
> + uint32_t cr[4];
> + uint32_t ct[4];
> + uint32_t da[4];
> + uint32_t sa[4];
> + uint32_t sg[4];
> + uint32_t sr;
> + uint32_t sgc;
> + uint32_t slp;
> + uint32_t pol;
> +};
> +
> /* GPIO */
> #define TYPE_PPC405_GPIO "ppc405-gpio"
> OBJECT_DECLARE_SIMPLE_TYPE(Ppc405GpioState, PPC405_GPIO);
> @@ -180,6 +202,7 @@ struct Ppc405SoCState {
> Ppc405GptState gpt;
> Ppc405OcmState ocm;
> Ppc405GpioState gpio;
> + Ppc405DmaState dma;
> };
>
> /* PowerPC 405 core */
> diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
> index a6c4e6934ffc..2978a2665a4f 100644
> --- a/hw/ppc/ppc405_uc.c
> +++ b/hw/ppc/ppc405_uc.c
> @@ -613,35 +613,20 @@ enum {
> DMA0_POL = 0x126,
> };
>
> -typedef struct ppc405_dma_t ppc405_dma_t;
> -struct ppc405_dma_t {
> - qemu_irq irqs[4];
> - uint32_t cr[4];
> - uint32_t ct[4];
> - uint32_t da[4];
> - uint32_t sa[4];
> - uint32_t sg[4];
> - uint32_t sr;
> - uint32_t sgc;
> - uint32_t slp;
> - uint32_t pol;
> -};
> -
> -static uint32_t dcr_read_dma (void *opaque, int dcrn)
> +static uint32_t dcr_read_dma(void *opaque, int dcrn)
> {
> return 0;
> }
>
> -static void dcr_write_dma (void *opaque, int dcrn, uint32_t val)
> +static void dcr_write_dma(void *opaque, int dcrn, uint32_t val)
> {
> }
>
> -static void ppc405_dma_reset (void *opaque)
> +static void ppc405_dma_reset(DeviceState *dev)
> {
> - ppc405_dma_t *dma;
> + Ppc405DmaState *dma = PPC405_DMA(dev);
> int i;
>
> - dma = opaque;
> for (i = 0; i < 4; i++) {
> dma->cr[i] = 0x00000000;
> dma->ct[i] = 0x00000000;
> @@ -655,13 +640,20 @@ static void ppc405_dma_reset (void *opaque)
> dma->pol = 0x00000000;
> }
>
> -static void ppc405_dma_init(CPUPPCState *env, qemu_irq irqs[4])
> +static void ppc405_dma_realize(DeviceState *dev, Error **errp)
> {
> - ppc405_dma_t *dma;
> + Ppc405DmaState *dma = PPC405_DMA(dev);
> + CPUPPCState *env;
> + int i;
> +
> + assert(dma->cpu);
> +
> + env = &dma->cpu->env;
> +
> + for (i = 0; i < ARRAY_SIZE(dma->irqs); i++) {
> + sysbus_init_irq(SYS_BUS_DEVICE(dma), &dma->irqs[i]);
> + }
>
> - dma = g_new0(ppc405_dma_t, 1);
> - memcpy(dma->irqs, irqs, 4 * sizeof(qemu_irq));
> - qemu_register_reset(&ppc405_dma_reset, dma);
> ppc_dcr_register(env, DMA0_CR0,
> dma, &dcr_read_dma, &dcr_write_dma);
> ppc_dcr_register(env, DMA0_CT0,
> @@ -712,6 +704,22 @@ static void ppc405_dma_init(CPUPPCState *env, qemu_irq irqs[4])
> dma, &dcr_read_dma, &dcr_write_dma);
> }
>
> +static Property ppc405_dma_properties[] = {
> + DEFINE_PROP_LINK("cpu", Ppc405DmaState, cpu, TYPE_POWERPC_CPU,
> + PowerPCCPU *),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> +static void ppc405_dma_class_init(ObjectClass *oc, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(oc);
> +
> + dc->realize = ppc405_dma_realize;
> + dc->user_creatable = false;
> + dc->reset = ppc405_dma_reset;
> + device_class_set_props(dc, ppc405_dma_properties);
> +}
> +
> /*****************************************************************************/
> static uint64_t ppc405_gpio_read(void *opaque, hwaddr addr, unsigned size)
> {
> @@ -1408,12 +1416,14 @@ static void ppc405_soc_instance_init(Object *obj)
> object_initialize_child(obj, "ocm", &s->ocm, TYPE_PPC405_OCM);
>
> object_initialize_child(obj, "gpio", &s->gpio, TYPE_PPC405_GPIO);
> +
> + object_initialize_child(obj, "dma", &s->dma, TYPE_PPC405_DMA);
> }
>
> static void ppc405_soc_realize(DeviceState *dev, Error **errp)
> {
> Ppc405SoCState *s = PPC405_SOC(dev);
> - qemu_irq dma_irqs[4], mal_irqs[4];
> + qemu_irq mal_irqs[4];
> CPUPPCState *env;
> Error *err = NULL;
> int i;
> @@ -1485,11 +1495,16 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
> ppc405_ebc_init(env);
>
> /* DMA controller */
> - dma_irqs[0] = qdev_get_gpio_in(s->uic, 5);
> - dma_irqs[1] = qdev_get_gpio_in(s->uic, 6);
> - dma_irqs[2] = qdev_get_gpio_in(s->uic, 7);
> - dma_irqs[3] = qdev_get_gpio_in(s->uic, 8);
> - ppc405_dma_init(env, dma_irqs);
> + object_property_set_link(OBJECT(&s->dma), "cpu", OBJECT(&s->cpu),
> + &error_abort);
> + if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
> + return;
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(s->dma.irqs); i++) {
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), i,
> + qdev_get_gpio_in(s->uic, 5 + i));
> + }
>
> /* I2C controller */
> sysbus_create_simple(TYPE_PPC4xx_I2C, 0xef600500,
> @@ -1563,6 +1578,11 @@ static void ppc405_soc_class_init(ObjectClass *oc, void *data)
>
> static const TypeInfo ppc405_types[] = {
> {
> + .name = TYPE_PPC405_DMA,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(Ppc405DmaState),
> + .class_init = ppc405_dma_class_init,
> + }, {
> .name = TYPE_PPC405_GPIO,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(Ppc405GpioState),
next prev parent reply other threads:[~2022-08-03 9:32 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-01 13:10 [PATCH 00/19] ppc: QOM'ify 405 board Cédric Le Goater
2022-08-01 13:10 ` [PATCH 01/19] ppc/ppc405: Remove taihu machine Cédric Le Goater
2022-08-02 18:02 ` Daniel Henrique Barboza
2022-08-03 7:33 ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 02/19] ppc/ppc405: Introduce a PPC405 generic machine Cédric Le Goater
2022-08-02 19:07 ` Daniel Henrique Barboza
2022-08-03 7:34 ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 03/19] ppc/ppc405: Move devices under the ref405ep machine Cédric Le Goater
2022-08-02 19:08 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 04/19] ppc/ppc405: Introduce a PPC405 SoC Cédric Le Goater
2022-08-02 19:18 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 05/19] ppc/ppc405: Start QOMification of the SoC Cédric Le Goater
2022-08-02 19:18 ` Daniel Henrique Barboza
2022-08-02 21:24 ` BALATON Zoltan
2022-08-03 7:54 ` Cédric Le Goater
2022-08-03 9:23 ` Daniel Henrique Barboza
2022-08-03 8:03 ` Cédric Le Goater
2022-08-03 11:59 ` BALATON Zoltan
2022-08-03 12:28 ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 06/19] ppc/ppc405: QOM'ify CPU Cédric Le Goater
2022-08-03 9:09 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 07/19] ppc/ppc405: QOM'ify CPC Cédric Le Goater
2022-08-03 9:14 ` Daniel Henrique Barboza
2022-08-03 9:16 ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 08/19] ppc/ppc405: QOM'ify GPT Cédric Le Goater
2022-08-03 9:15 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 09/19] ppc/ppc405: QOM'ify OCM Cédric Le Goater
2022-08-03 9:16 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 10/19] ppc/ppc405: QOM'ify GPIO Cédric Le Goater
2022-08-03 9:24 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 11/19] ppc/ppc405: QOM'ify DMA Cédric Le Goater
2022-08-03 9:25 ` Daniel Henrique Barboza [this message]
2022-08-01 13:10 ` [PATCH 12/19] ppc/ppc405: QOM'ify EBC Cédric Le Goater
2022-08-03 9:26 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 13/19] ppc/ppc405: QOM'ify OPBA Cédric Le Goater
2022-08-03 9:27 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 14/19] ppc/ppc405: QOM'ify POB Cédric Le Goater
2022-08-03 9:27 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 15/19] ppc/ppc405: QOM'ify PLB Cédric Le Goater
2022-08-03 9:43 ` Daniel Henrique Barboza
2022-08-03 11:06 ` BALATON Zoltan
2022-08-01 13:10 ` [PATCH 16/19] ppc/ppc405: QOM'ify MAL Cédric Le Goater
2022-08-03 9:45 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 17/19] ppc/ppc405: QOM'ify FPGA Cédric Le Goater
2022-08-03 9:45 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 18/19] ppc/ppc405: QOM'ify UIC Cédric Le Goater
2022-08-01 13:17 ` Cédric Le Goater
2022-08-03 9:46 ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 19/19] ppc/ppc405: QOM'ify I2C Cédric Le Goater
2022-08-03 9:46 ` Daniel Henrique Barboza
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