From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair.francis@opensource.wdc.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: bmeng.cn@gmail.com, palmer@dabbelt.com, alistair.francis@wdc.com,
alistair23@gmail.com
Subject: Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
Date: Fri, 14 Oct 2022 05:16:50 +1100 [thread overview]
Message-ID: <24a38a9e-b8e3-9076-8e5e-05b24ada5e34@linaro.org> (raw)
In-Reply-To: <20221012011449.506928-1-alistair.francis@opensource.wdc.com>
On 10/12/22 18:14, Alistair Francis wrote:
> From: Alistair Francis<alistair.francis@wdc.com>
>
> Since commit 4047368938f6 "accel/tcg: Introduce tlb_set_page_full" we
> have been seeing this assert
>
> ../accel/tcg/cputlb.c:1294: tlb_set_page_with_attrs: Assertion `is_power_of_2(size)' failed.
>
> When running Tock on the OpenTitan machine.
>
> The issue is that pmp_get_tlb_size() would return a TLB size that wasn't
> a power of 2. The size was also smaller then TARGET_PAGE_SIZE.
>
> This patch ensures that any TLB size less then TARGET_PAGE_SIZE is
> rounded down to 1 to ensure it's a valid size.
>
> Signed-off-by: Alistair Francis<alistair.francis@wdc.com>
> ---
> This is based on advice from Richard:
> https://patchwork.kernel.org/project/qemu-devel/patch/20221004141051.110653-9-richard.henderson@linaro.org/#25043166
>
> target/riscv/pmp.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2022-10-13 18:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-12 1:14 [PATCH] target/riscv: pmp: Fixup TLB size calculation Alistair Francis
2022-10-12 2:50 ` LIU Zhiwei
2022-10-12 3:09 ` Alistair Francis
2022-10-12 6:04 ` LIU Zhiwei
2022-10-13 18:16 ` Richard Henderson [this message]
2022-10-14 4:36 ` Alistair Francis
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