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From: Tao Xu <tao3.xu@intel.com>
To: Igor Mammedov <imammedo@redhat.com>
Cc: "ehabkost@redhat.com" <ehabkost@redhat.com>,
	"Liu, Jingqi" <jingqi.liu@intel.com>,
	"Du, Fan" <fan.du@intel.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"jonathan.cameron@huawei.com" <jonathan.cameron@huawei.com>,
	"Williams, Dan J" <dan.j.williams@intel.com>
Subject: Re: [PATCH v12 09/11] hmat acpi: Build System Locality Latency and Bandwidth Information Structure(s)
Date: Thu, 10 Oct 2019 14:53:56 +0800	[thread overview]
Message-ID: <24a4842c-4ce4-3a7f-5032-8e74458de44c@intel.com> (raw)
In-Reply-To: <20191003164111.078fdce4@redhat.com>

On 10/3/2019 10:41 PM, Igor Mammedov wrote:
> On Fri, 20 Sep 2019 15:43:47 +0800
> Tao Xu <tao3.xu@intel.com> wrote:
> 
>> From: Liu Jingqi <jingqi.liu@intel.com>
>>
>> This structure describes the memory access latency and bandwidth
>> information from various memory access initiator proximity domains.
>> The latency and bandwidth numbers represented in this structure
>> correspond to rated latency and bandwidth for the platform.
>> The software could use this information as hint for optimization.
>>
>> Signed-off-by: Liu Jingqi <jingqi.liu@intel.com>
>> Signed-off-by: Tao Xu <tao3.xu@intel.com>
>> ---
>>
>> Changes in v12:
>>      - Fix a bug that if HMAT is enabled and without hmat-lb setting,
>>        QEMU will crash. (reported by Danmei Wei)
>>
>> Changes in v11:
>>      - Calculate base in build_hmat_lb().
>> ---
>>   hw/acpi/hmat.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++-
>>   hw/acpi/hmat.h |   2 +
>>   2 files changed, 127 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/acpi/hmat.c b/hw/acpi/hmat.c
>> index 1368fce7ee..e7be849581 100644
>> --- a/hw/acpi/hmat.c
>> +++ b/hw/acpi/hmat.c
>> @@ -27,6 +27,7 @@
>>   #include "qemu/osdep.h"
>>   #include "sysemu/numa.h"
>>   #include "hw/acpi/hmat.h"
>> +#include "qemu/error-report.h"
>>   
>>   /*
>>    * ACPI 6.3:
>> @@ -67,11 +68,105 @@ static void build_hmat_mpda(GArray *table_data, uint16_t flags, int initiator,
>>       build_append_int_noprefix(table_data, 0, 8);
>>   }
>>   
>> +static bool entry_overflow(uint64_t *lb_data, uint64_t base, int len)
>> +{
>> +    int i;
>> +
>> +    for (i = 0; i < len; i++) {
>> +        if (lb_data[i] / base >= UINT16_MAX) {
>> +            return true;
>> +        }
>> +    }
>> +
>> +    return false;
>> +}
> I suggest to do this check at CLI parsing time
> 
>> +/*
>> + * ACPI 6.3: 5.2.27.4 System Locality Latency and Bandwidth Information
>> + * Structure: Table 5-146
>> + */
>> +static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb,
>> +                          uint32_t num_initiator, uint32_t num_target,
>> +                          uint32_t *initiator_list, int type)
>> +{
>> +    uint8_t mask = 0x0f;
>> +    uint32_t s = num_initiator;
>> +    uint32_t t = num_target;
> drop this locals and use arguments directly
> 
>> +    uint64_t base = 1;
>> +    uint64_t *lb_data;
>> +    int i, unit;
>> +
>> +    /* Type */
>> +    build_append_int_noprefix(table_data, 1, 2);
>> +    /* Reserved */
>> +    build_append_int_noprefix(table_data, 0, 2);
>> +    /* Length */
>> +    build_append_int_noprefix(table_data, 32 + 4 * s + 4 * t + 2 * s * t, 4);
>                                               ^^^^
> to me above looks like /dev/random output, absolutely unreadable.
> Suggest to use local var (like: lb_length) for expression with comments
> beside magic numbers.
> 
>> +    /* Flags: Bits [3:0] Memory Hierarchy, Bits[7:4] Reserved */
>> +    build_append_int_noprefix(table_data, hmat_lb->hierarchy & mask, 1);
> 
> why do you need to use mask here?
> 
Because Bits[7:4] Reserved, so I use mask to keep it reserved.

>> +    /* Data Type */
>> +    build_append_int_noprefix(table_data, hmat_lb->data_type, 1);
> 
> Isn't hmat_lb->data_type and passed argument 'type' the same?
> 
Yes, I will drop 'type'.
> 
>> +    /* Reserved */
>> +    build_append_int_noprefix(table_data, 0, 2);
>> +    /* Number of Initiator Proximity Domains (s) */
>> +    build_append_int_noprefix(table_data, s, 4);
>> +    /* Number of Target Proximity Domains (t) */
>> +    build_append_int_noprefix(table_data, t, 4);
>> +    /* Reserved */
>> +    build_append_int_noprefix(table_data, 0, 4);
>> +
>> +    if (HMAT_IS_LATENCY(type)) {
>> +        unit = 1000;
>> +        lb_data = hmat_lb->latency;
>> +    } else {
>> +        unit = 1024;
>> +        lb_data = hmat_lb->bandwidth;
>> +    }
>> +
>> +    while (entry_overflow(lb_data, base, s * t)) {
>> +        for (i = 0; i < s * t; i++) {
>> +            if (!QEMU_IS_ALIGNED(lb_data[i], unit * base)) {
>> +                error_report("Invalid latency/bandwidth input, all "
>> +                "latencies/bandwidths should be specified in the same units.");
>> +                exit(1);
>> +            }
>> +        }
>> +        base *= unit;
>> +    }
> Can you clarify what you are trying to check here?
> 
This part I use entry_overflow() to check if uint16 can store entry. If 
can't store and the entries matrix can be divisible by unit * base, then 
base will be unit * base.

For example, if lb_data[i] are 1048576(1TB/s) and 1024(1GB/s), unit is 
1024, so 1048576 is bigger than UINT16_MAX, and can be divisible by 1024 
* 1, so base is 1024 and entries are 1024 and 1 (see entry = 
hmat_lb->latency[i] / base;). The benefit is even user input different 
unit(TB/s vs GB/s), we can still store the data as far as possible.

>> +
>> +    /* Entry Base Unit */
>> +    build_append_int_noprefix(table_data, base, 8);
>> +
>> +    /* Initiator Proximity Domain List */
>> +    for (i = 0; i < s; i++) {
>> +        build_append_int_noprefix(table_data, initiator_list[i], 4);
>> +    }
>> +
>> +    /* Target Proximity Domain List */
>> +    for (i = 0; i < t; i++) {
>> +        build_append_int_noprefix(table_data, i, 4);
>> +    }
>> +
>> +    /* Latency or Bandwidth Entries */
>> +    for (i = 0; i < s * t; i++) {
>> +        uint16_t entry;
>> +
>> +        if (HMAT_IS_LATENCY(type)) {
> drop if condition and reuse lb_data, that you've just initialized above
> 
> 
>> +            entry = hmat_lb->latency[i] / base;
> ...
>> +            entry = hmat_lb->bandwidth[i] / base;
> I'm not sure that above is correct.
> Pls clarify math behind above 2 expressions
> 
>> +        }
>> +
>> +        build_append_int_noprefix(table_data, entry, 2);
>> +    }
>> +}
>> +
>>   /* Build HMAT sub table structures */
>>   static void hmat_build_table_structs(GArray *table_data, NumaState *nstat)
>>   {
>>       uint16_t flags;
>> -    int i;
>> +    uint32_t *initiator_list = NULL;
>> +    int i, j, hrchy, type;
> s/hrchy/hierarchy/
> 
>> +    HMAT_LB_Info *numa_hmat_lb;
>>   
>>       for (i = 0; i < nstat->num_nodes; i++) {
>>           flags = 0;
>> @@ -82,6 +177,35 @@ static void hmat_build_table_structs(GArray *table_data, NumaState *nstat)
>>   
>>           build_hmat_mpda(table_data, flags, nstat->nodes[i].initiator, i);
>>       }
>> +
>> +    if (nstat->num_initiator) {
>> +        initiator_list = g_malloc0(nstat->num_initiator * sizeof(uint32_t));
>> +        for (i = 0, j = 0; i < nstat->num_nodes; i++) {
>> +            if (nstat->nodes[i].has_cpu) {
>> +                initiator_list[j] = i;
>> +                j++;
>> +            }
>> +        }
>> +    }
>> +
>> +    /*
>> +     * ACPI 6.3: 5.2.27.4 System Locality Latency and Bandwidth Information
>> +     * Structure: Table 5-146
>> +     */
>> +    for (hrchy = HMAT_LB_MEM_MEMORY;
>> +         hrchy <= HMAT_LB_MEM_CACHE_3RD_LEVEL; hrchy++) {
>> +        for (type = HMAT_LB_DATA_ACCESS_LATENCY;
>> +             type <= HMAT_LB_DATA_WRITE_BANDWIDTH; type++) {
>> +            numa_hmat_lb = nstat->hmat_lb[hrchy][type];
>> +
>> +            if (numa_hmat_lb) {
>> +                build_hmat_lb(table_data, numa_hmat_lb, nstat->num_initiator,
>> +                              nstat->num_nodes, initiator_list, type);
>> +            }
>> +        }
>> +    }
>> +
>> +    g_free(initiator_list);
>>   }
>>   
>>   void build_hmat(GArray *table_data, BIOSLinker *linker, NumaState *nstat)
>> diff --git a/hw/acpi/hmat.h b/hw/acpi/hmat.h
>> index 0c1839cf6f..1154dfb48e 100644
>> --- a/hw/acpi/hmat.h
>> +++ b/hw/acpi/hmat.h
>> @@ -40,6 +40,8 @@
>>    */
>>   #define HMAT_PROX_INIT_VALID 0x1
>>   
>> +#define HMAT_IS_LATENCY(type) (type <= HMAT_LB_DATA_WRITE_LATENCY)
> 
> it's not worth to create macro for 1-off calculation, just drop it
> and s/if (HMAT_IS_LATENCY(type))/if(type <= HMAT_LB_DATA_WRITE_LATENCY)/
> 
>> +
>>   void build_hmat(GArray *table_data, BIOSLinker *linker, NumaState *nstat);
>>   
>>   #endif
> 



  reply	other threads:[~2019-10-10  6:55 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-20  7:43 [PATCH v12 00/11] Build ACPI Heterogeneous Memory Attribute Table (HMAT) Tao Xu
2019-09-20  7:43 ` [PATCH v12 01/11] util/cutils: Add qemu_strtotime_ps() Tao Xu
2019-09-20  7:43 ` [PATCH v12 02/11] tests/cutils: Add test for qemu_strtotime_ps() Tao Xu
2019-09-20  7:43 ` [PATCH v12 03/11] qapi: Add builtin type time Tao Xu
2019-10-15  6:22   ` Tao Xu
2019-09-20  7:43 ` [PATCH v12 04/11] tests: Add test for QAPI " Tao Xu
2019-09-20  7:43 ` [PATCH v12 05/11] numa: Extend CLI to provide initiator information for numa nodes Tao Xu
2019-09-30 11:25   ` Igor Mammedov
2019-09-20  7:43 ` [PATCH v12 06/11] numa: Extend CLI to provide memory latency and bandwidth information Tao Xu
2019-10-02 15:16   ` Igor Mammedov
2019-10-09  6:39     ` Tao Xu
2019-10-11 13:56       ` Igor Mammedov
2019-10-12  2:54         ` Tao Xu
2019-09-20  7:43 ` [PATCH v12 07/11] numa: Extend CLI to provide memory side cache information Tao Xu
2019-10-03 11:19   ` Igor Mammedov
2019-10-09  7:54     ` Tao Xu
2019-10-11 14:10       ` Igor Mammedov
2019-09-20  7:43 ` [PATCH v12 08/11] hmat acpi: Build Memory Proximity Domain Attributes Structure(s) Tao Xu
2019-10-03 13:44   ` Igor Mammedov
2019-09-20  7:43 ` [PATCH v12 09/11] hmat acpi: Build System Locality Latency and Bandwidth Information Structure(s) Tao Xu
2019-10-03 14:41   ` Igor Mammedov
2019-10-10  6:53     ` Tao Xu [this message]
2019-10-11 14:08       ` Igor Mammedov
2019-10-12  3:04         ` Tao Xu
2019-10-14  9:00           ` Igor Mammedov
2019-10-15  0:59             ` Tao Xu
2019-10-15  5:40               ` Tao Xu
2019-10-17 14:17                 ` Igor Mammedov
2019-09-20  7:43 ` [PATCH v12 10/11] hmat acpi: Build Memory Side Cache " Tao Xu
2019-10-04  8:01   ` Igor Mammedov
2019-09-20  7:43 ` [PATCH v12 11/11] tests/bios-tables-test: add test cases for ACPI HMAT Tao Xu
2019-10-04  8:08   ` Igor Mammedov
2019-09-21  1:39 ` [PATCH v12 00/11] Build ACPI Heterogeneous Memory Attribute Table (HMAT) no-reply
2019-09-21  1:53 ` no-reply

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