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References: <20170627161032.5014-1-david@redhat.com>
From: Thomas Huth <thuth@redhat.com>
Message-ID: <251b8047-7df4-50a5-cce7-b66858c781a1@redhat.com>
Date: Wed, 28 Jun 2017 16:21:20 +0200
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Subject: Re: [Qemu-devel] [PATCH v1] s390x/cpumodel: allow to enable "idtes"
 feature for TCG
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To: David Hildenbrand <david@redhat.com>, qemu-devel@nongnu.org
Cc: rth@twiddle.net, agraf@suse.de, Aurelien Jarno <aurelien@aurel32.net>

On 27.06.2017 18:10, David Hildenbrand wrote:
> STFL bit 4 and 5 are just indications to the guest, which TLB entries an
> IDTE call will clear. These are performance indicators for the guest.
> 
> STFL bit 4:
>     INVALIDATE DAT TABLE ENTRY (IDTE) performs
>     the invalidation-and-clearing operation by
>     selectively clearing TLB segment-table entries
>     when a segment-table entry or entries are
>     invalidated. IDTE also performs the clearing-by-
>     ASCE operation. Unless bit 4 is one, IDTE simply
>     purges all TLBs. Bit 3 is one if bit 4 is one.
> 
> We can simply set STFL bit 4 ("idtes") and still purge the complete TLB.
> Purging more than advertised is never bad. E.g. Linux doesn't even care
> about this bit. We can optimized this later.

Not sure, but why do we need this bit in add_qemu_cpu_model_features()
if Linux does not care about it? We will get it automatically once we
support the z9 in TCG...

 Thomas