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From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: "Alexander Graf" <agraf@csgraf.de>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Cameron Esfahani" <dirty@apple.com>,
	"Mads Ynddal" <mads@ynddal.dk>,
	qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Ani Sinha" <anisinha@redhat.com>,
	"Phil Dennis-Jordan" <phil@philjordan.eu>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Sunil Muthuswamy" <sunilmut@microsoft.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"\"Daniel P. Berrangé\"" <berrange@redhat.com>,
	"Shannon Zhao" <shannon.zhaosl@gmail.com>,
	kvm@vger.kernel.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Pedro Barbuda" <pbarbuda@microsoft.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Roman Bolshakov" <rbolshakov@ddn.com>
Subject: Re: [PATCH v7 15/24] hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS
Date: Thu, 16 Oct 2025 20:19:48 +0200	[thread overview]
Message-ID: <25E6C302-43A7-4D52-BFBA-0712085DF63F@unpredictable.fr> (raw)
In-Reply-To: <20251016165520.62532-16-mohamed@unpredictable.fr>

Note for this specific one (already posted on IRC, but worth keeping in mind for a merge), mail server is misbehaving… (so v8 has been posted partially. And this is the change there)

It has a bug, with the changed commit being at https://github.com/mediouni-m/qemu/commit/863eb69916be4a43ddde62276bb643caf46ef236

The delta between the two:

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index c716130206..8e730731ca 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -961,7 +961,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
        }
    }

-    if (virt_is_its_enabled(vms) && !vms->no_gicv3_with_gicv2m) {
+    if (!(vms->gic_version != VIRT_GIC_VERSION_2 && virt_is_its_enabled(vms))
+     && !vms->no_gicv3_with_gicv2m) {
        const uint16_t spi_base = vms->irqmap[VIRT_GIC_V2M] + ARM_SPI_BASE;

        /* 5.2.12.16 GIC MSI Frame Structure */

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 1904765db3..b5bed029b9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2717,10 +2717,6 @@ static void virt_set_highmem_mmio_size(Object *obj, Visitor *v,

bool virt_is_its_enabled(VirtMachineState *vms)
{
-    if (vms->gic_version == VIRT_GIC_VERSION_2) {
-        return false;
-    }
-
    if (vms->its == ON_OFF_AUTO_OFF) {
        return false;
    }



> On 16. Oct 2025, at 18:55, Mohamed Mediouni <mohamed@unpredictable.fr> wrote:
> 
> Switch its to a tristate.
> 
> Windows Hypervisor Platform's vGIC doesn't support ITS.
> Deal with this by reporting to the user and exiting.
> 
> Regular configuration: GICv3 + ITS
> New default configuration with WHPX: GICv3 with GICv2m
> And its=off explicitly for the newest machine version: GICv3 + GICv2m
> 
> Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
> ---
> hw/arm/virt-acpi-build.c | 14 +++++------
> hw/arm/virt.c            | 50 ++++++++++++++++++++++++++++++++--------
> include/hw/arm/virt.h    |  4 +++-
> 3 files changed, 50 insertions(+), 18 deletions(-)
> 
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 0a6ec74aa0..c716130206 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -472,7 +472,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>        nb_nodes = num_smmus + 1; /* RC and SMMUv3 */
>        rc_mapping_count = rc_smmu_idmaps_len;
> 
> -        if (vms->its) {
> +        if (virt_is_its_enabled(vms)) {
>            /*
>             * Knowing the ID ranges from the RC to the SMMU, it's possible to
>             * determine the ID ranges from RC that go directly to ITS.
> @@ -483,7 +483,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>            rc_mapping_count += rc_its_idmaps->len;
>        }
>    } else {
> -        if (vms->its) {
> +        if (virt_is_its_enabled(vms)) {
>            nb_nodes = 2; /* RC and ITS */
>            rc_mapping_count = 1; /* Direct map to ITS */
>        } else {
> @@ -498,7 +498,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>    build_append_int_noprefix(table_data, IORT_NODE_OFFSET, 4);
>    build_append_int_noprefix(table_data, 0, 4); /* Reserved */
> 
> -    if (vms->its) {
> +    if (virt_is_its_enabled(vms)) {
>        /* Table 12 ITS Group Format */
>        build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Type */
>        node_size =  20 /* fixed header size */ + 4 /* 1 GIC ITS Identifier */;
> @@ -517,7 +517,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>        int smmu_mapping_count, offset_to_id_array;
>        int irq = sdev->irq;
> 
> -        if (vms->its) {
> +        if (virt_is_its_enabled(vms)) {
>            smmu_mapping_count = 1; /* ITS Group node */
>            offset_to_id_array = SMMU_V3_ENTRY_SIZE; /* Just after the header */
>        } else {
> @@ -610,7 +610,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>            }
>        }
> 
> -        if (vms->its) {
> +        if (virt_is_its_enabled(vms)) {
>            /*
>             * Map bypassed (don't go through the SMMU) RIDs (input) to
>             * ITS Group node directly: RC -> ITS.
> @@ -945,7 +945,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>                                          memmap[VIRT_HIGH_GIC_REDIST2].size);
>        }
> 
> -        if (vms->its) {
> +        if (virt_is_its_enabled(vms)) {
>            /*
>             * ACPI spec, Revision 6.0 Errata A
>             * (original 6.0 definition has invalid Length)
> @@ -961,7 +961,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>        }
>    }
> 
> -    if (!(vms->gic_version != VIRT_GIC_VERSION_2 && vms->its) && !vms->no_gicv3_with_gicv2m) {
> +    if (virt_is_its_enabled(vms) && !vms->no_gicv3_with_gicv2m) {
>        const uint16_t spi_base = vms->irqmap[VIRT_GIC_V2M] + ARM_SPI_BASE;
> 
>        /* 5.2.12.16 GIC MSI Frame Structure */
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 9121eb37eb..1bebbc265d 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -735,7 +735,7 @@ static void create_its(VirtMachineState *vms)
> {
>    DeviceState *dev;
> 
> -    assert(vms->its);
> +    assert(virt_is_its_enabled(vms));
>    if (!kvm_irqchip_in_kernel() && !vms->tcg_its) {
>        /*
>         * Do nothing if ITS is neither supported by the host nor emulated by
> @@ -744,6 +744,15 @@ static void create_its(VirtMachineState *vms)
>        return;
>    }
> 
> +    if (whpx_enabled() && vms->tcg_its) {
> +        /*
> +         * Signal to the user when ITS is neither supported by the host
> +         * nor emulated by the machine.
> +         */
> +        info_report("ITS not supported on WHPX.");
> +        exit(1);
> +    }
> +
>    dev = qdev_new(its_class_name());
> 
>    object_property_set_link(OBJECT(dev), "parent-gicv3", OBJECT(vms->gic),
> @@ -955,7 +964,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
> 
>    fdt_add_gic_node(vms);
> 
> -    if (vms->gic_version != VIRT_GIC_VERSION_2 && vms->its) {
> +    if (vms->gic_version != VIRT_GIC_VERSION_2 && virt_is_its_enabled(vms)) {
>        create_its(vms);
>    } else if (vms->gic_version != VIRT_GIC_VERSION_2 && !vms->no_gicv3_with_gicv2m) {
>        create_v2m(vms);
> @@ -2705,18 +2714,38 @@ static void virt_set_highmem_mmio_size(Object *obj, Visitor *v,
>    extended_memmap[VIRT_HIGH_PCIE_MMIO].size = size;
> }
> 
> -static bool virt_get_its(Object *obj, Error **errp)
> +bool virt_is_its_enabled(VirtMachineState *vms)
> +{
> +    if (vms->gic_version == VIRT_GIC_VERSION_2) {
> +        return false;
> +    }
> +
> +    if (vms->its == ON_OFF_AUTO_OFF) {
> +        return false;
> +    }
> +    if (vms->its == ON_OFF_AUTO_AUTO) {
> +        if (whpx_enabled()) {
> +            return false;
> +        }
> +    }
> +    return true;
> +}
> +
> +static void virt_get_its(Object *obj, Visitor *v, const char *name,
> +                          void *opaque, Error **errp)
> {
>    VirtMachineState *vms = VIRT_MACHINE(obj);
> +    OnOffAuto its = vms->its;
> 
> -    return vms->its;
> +    visit_type_OnOffAuto(v, name, &its, errp);
> }
> 
> -static void virt_set_its(Object *obj, bool value, Error **errp)
> +static void virt_set_its(Object *obj, Visitor *v, const char *name,
> +                          void *opaque, Error **errp)
> {
>    VirtMachineState *vms = VIRT_MACHINE(obj);
> 
> -    vms->its = value;
> +    visit_type_OnOffAuto(v, name, &vms->its, errp);
> }
> 
> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> @@ -3426,8 +3455,9 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>                                          "guest CPU which implements the ARM "
>                                          "Memory Tagging Extension");
> 
> -    object_class_property_add_bool(oc, "its", virt_get_its,
> -                                   virt_set_its);
> +    object_class_property_add(oc, "its", "OnOffAuto",
> +        virt_get_its, virt_set_its,
> +        NULL, NULL);
>    object_class_property_set_description(oc, "its",
>                                          "Set on/off to enable/disable "
>                                          "ITS instantiation");
> @@ -3487,8 +3517,8 @@ static void virt_instance_init(Object *obj)
>    vms->highmem_mmio = true;
>    vms->highmem_redists = true;
> 
> -    /* Default allows ITS instantiation */
> -    vms->its = true;
> +    /* Default allows ITS instantiation if available */
> +    vms->its = ON_OFF_AUTO_AUTO;
>    /* Allow ITS emulation if the machine version supports it */
>    vms->tcg_its = !vmc->no_tcg_its;
>    vms->no_gicv3_with_gicv2m = false;
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index d31348dd61..997dd51678 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -149,7 +149,7 @@ struct VirtMachineState {
>    bool highmem_ecam;
>    bool highmem_mmio;
>    bool highmem_redists;
> -    bool its;
> +    OnOffAuto its;
>    bool tcg_its;
>    bool virt;
>    bool ras;
> @@ -218,4 +218,6 @@ static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
>            vms->highmem_redists) ? 2 : 1;
> }
> 
> +bool virt_is_its_enabled(VirtMachineState *vms);
> +
> #endif /* QEMU_ARM_VIRT_H */
> -- 
> 2.50.1 (Apple Git-155)
> 



  parent reply	other threads:[~2025-10-16 18:22 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16 16:54 [PATCH v7 00/24] WHPX support for Arm Mohamed Mediouni
2025-10-16 16:54 ` [PATCH v7 01/24] target/arm/kvm: add constants for new PSCI versions Mohamed Mediouni
2025-10-16 17:07   ` Pierrick Bouvier
2025-10-16 16:54 ` [PATCH v7 02/24] accel/system: Introduce hwaccel_enabled() helper Mohamed Mediouni
2025-10-16 16:54 ` [PATCH v7 03/24] qtest: hw/arm: virt: skip ACPI test for ITS off Mohamed Mediouni
2025-10-16 17:08   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 04/24] hw/arm: virt: add GICv2m for the case when ITS is not available Mohamed Mediouni
2025-10-16 17:09   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 05/24] tests: data: update AArch64 ACPI tables Mohamed Mediouni
2025-10-16 17:10   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 06/24] whpx: Move around files before introducing AArch64 support Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 07/24] whpx: reshuffle common code Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 08/24] whpx: ifdef out winhvemulation on non-x86_64 Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 09/24] whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 10/24] hw, target, accel: whpx: change apic_in_platform to kernel_irqchip Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 11/24] whpx: interrupt controller support Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 12/24] whpx: add arm64 support Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 13/24] whpx: copy over memory management logic from hvf Mohamed Mediouni
2025-10-22 18:55   ` Philippe Mathieu-Daudé
2025-10-16 16:55 ` [PATCH v7 14/24] target/arm: cpu: mark WHPX as supporting PSCI 1.3 Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 15/24] hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS Mohamed Mediouni
2025-10-16 17:10   ` Pierrick Bouvier
2025-10-16 18:19   ` Mohamed Mediouni [this message]
2025-10-16 16:55 ` [PATCH v7 16/24] docs: arm: update virt machine model description Mohamed Mediouni
2025-10-16 17:11   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 17/24] whpx: arm64: clamp down IPA size Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 18/24] hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX and HVF Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 19/24] whpx: arm64: implement -cpu host Mohamed Mediouni
2025-10-16 17:12   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 20/24] target/arm: whpx: instantiate GIC early Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 21/24] whpx: arm64: gicv3: add migration blocker Mohamed Mediouni
2025-10-16 17:14   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 22/24] whpx: enable arm64 builds Mohamed Mediouni
2025-10-16 17:14   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 23/24] MAINTAINERS: update maintainers for WHPX Mohamed Mediouni
2025-10-16 17:15   ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 24/24] whpx: apic: use non-deprecated APIs to control interrupt controller state Mohamed Mediouni
2025-10-16 17:15   ` Pierrick Bouvier
2025-10-20 10:27     ` Bernhard Beschow
2025-10-23  6:33       ` Philippe Mathieu-Daudé
2025-10-23  8:47         ` Pierrick Bouvier
2025-10-23  9:23         ` Bernhard Beschow
2025-10-23 17:02           ` Bernhard Beschow
2025-10-27  7:55             ` Pierrick Bouvier
2025-10-17  9:59 ` [PATCH v7 00/24] WHPX support for Arm Peter Maydell
2025-10-17 10:56   ` Mohamed Mediouni

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