From: Eric Blake <eblake@redhat.com>
To: Michael Clark <mjc@sifive.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
RISC-V Patches <patches@groups.riscv.org>
Subject: Re: [Qemu-devel] [PATCH v8 23/23] RISC-V Build Infrastructure
Date: Mon, 5 Mar 2018 09:59:50 -0600 [thread overview]
Message-ID: <25cfff0d-4fd2-ac85-f9e6-feec9d9e4469@redhat.com> (raw)
In-Reply-To: <CAHNT7NsGeLU8rzfJBBrKxuD9WffHRNcF=mUrgGXzWF=2Qz2FdA@mail.gmail.com>
On 03/02/2018 08:37 PM, Michael Clark wrote:
> Let me know if you have a branch for me to pull and rebase against.
http://repo.or.cz/qemu/ericb.git qapi
But that has landed in master now.
>
> We are passing all build and make check tests in travis (except for a
> couple of build timeouts because we are hitting the default 50 minute
> timeout)
>
> https://travis-ci.org/riscv/riscv-qemu/builds/348234736
>
Also, top-posting makes it a bit harder to see what you are replying to.
>>> qapi-schema.json | 17 ++++++++++++++++-
>>>
>>
>> Will need rebasing to modify qapi/misc.json if my pending PULL request
>> issues get resolved first:
>>
>> https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg00469.html
>>
--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3266
Virtualization: qemu.org | libvirt.org
next prev parent reply other threads:[~2018-03-05 15:59 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-02 13:51 [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 01/23] RISC-V Maintainers Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 02/23] RISC-V ELF Machine Definition Michael Clark
2018-03-09 13:05 ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 03/23] RISC-V CPU Core Definition Michael Clark
2018-03-03 2:23 ` Michael Clark
2018-03-03 2:34 ` Michael Clark
2018-03-05 9:44 ` Igor Mammedov
2018-03-05 22:24 ` Michael Clark
2018-03-06 8:58 ` Igor Mammedov
2018-03-06 10:41 ` Igor Mammedov
2018-03-07 3:23 ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 04/23] RISC-V Disassembler Michael Clark
2018-04-27 12:26 ` Peter Maydell
2018-04-29 23:27 ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 05/23] RISC-V CPU Helpers Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 06/23] RISC-V FPU Support Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 07/23] RISC-V GDB Stub Michael Clark
2018-03-09 12:46 ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 08/23] RISC-V TCG Code Generation Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 09/23] RISC-V Physical Memory Protection Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 10/23] RISC-V Linux User Emulation Michael Clark
2018-04-04 12:44 ` Laurent Vivier
2018-04-08 20:59 ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 11/23] Add symbol table callback interface to load_elf Michael Clark
2018-03-09 11:34 ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 12/23] RISC-V HTIF Console Michael Clark
2018-03-09 11:52 ` Philippe Mathieu-Daudé
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 13/23] RISC-V HART Array Michael Clark
2018-03-09 12:52 ` Philippe Mathieu-Daudé
2018-03-09 13:48 ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 14/23] SiFive RISC-V CLINT Block Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 15/23] SiFive RISC-V PLIC Block Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 16/23] RISC-V Spike Machines Michael Clark
2018-03-09 4:50 ` Michael Clark
2018-05-14 16:49 ` Peter Maydell
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 17/23] SiFive RISC-V Test Finisher Michael Clark
2018-03-09 11:57 ` Philippe Mathieu-Daudé
2018-03-10 3:01 ` Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine Michael Clark
2018-04-27 14:17 ` Peter Maydell
2018-04-30 0:18 ` Michael Clark
2018-04-30 7:49 ` Peter Maydell
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 19/23] SiFive RISC-V UART Device Michael Clark
2018-03-09 12:39 ` Philippe Mathieu-Daudé
2018-03-10 3:02 ` Michael Clark
2018-03-10 9:40 ` Mark Cave-Ayland
2018-03-11 11:43 ` Bastian Koppelmann
2018-03-16 18:30 ` Michael Clark
2018-03-16 18:36 ` Michael Clark
2018-03-16 20:46 ` Bastian Koppelmann
2018-04-10 3:21 ` Antony Pavlov
2018-04-10 6:17 ` Thomas Huth
2018-04-10 8:04 ` Antony Pavlov
2018-04-11 21:12 ` Michael Clark
2018-04-11 22:25 ` Eric Blake
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 20/23] SiFive RISC-V PRCI Block Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 21/23] SiFive Freedom E Series RISC-V Machine Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 22/23] SiFive Freedom U " Michael Clark
2018-03-02 13:51 ` [Qemu-devel] [PATCH v8 23/23] RISC-V Build Infrastructure Michael Clark
2018-03-02 14:33 ` Eric Blake
2018-03-03 2:37 ` Michael Clark
2018-03-05 15:59 ` Eric Blake [this message]
2018-03-09 13:03 ` Philippe Mathieu-Daudé
2018-03-02 14:17 ` [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission no-reply
2018-03-05 8:41 ` Richard W.M. Jones
2018-03-05 10:02 ` Alex Bennée
2018-03-09 15:07 ` Michael Clark
2018-03-09 16:43 ` Peter Maydell
2018-03-09 18:27 ` Richard W.M. Jones
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