From: cmd <clement.mathieudrif.etu@gmail.com>
To: Yi Liu <yi.l.liu@intel.com>,
CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "jasowang@redhat.com" <jasowang@redhat.com>,
"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
"kevin.tian@intel.com" <kevin.tian@intel.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"mst@redhat.com" <mst@redhat.com>
Subject: Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor
Date: Wed, 3 Jul 2024 10:28:06 +0200 [thread overview]
Message-ID: <263476c5-1136-4128-9d9c-76d107a78cf7@gmail.com> (raw)
In-Reply-To: <6f94f4da-27fb-4f8e-adba-33a2f4c20fe5@intel.com>
On 03/07/2024 09:29, Yi Liu wrote:
> On 2024/7/2 23:29, CLEMENT MATHIEU--DRIF wrote:
>>
>> On 02/07/2024 15:33, Yi Liu wrote:
>>> Caution: External email. Do not open attachments or click links,
>>> unless this email comes from a known sender and you know the content
>>> is safe.
>>>
>>>
>>> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>>>> From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
>>>>
>>>> Signed-off-by: Clément Mathieu--Drif
>>>> <clement.mathieu--drif@eviden.com>
>>>> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
>>>> ---
>>>> hw/i386/intel_iommu.c | 5 +++++
>>>> 1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>>>> index 98996ededc..71cebe2fd3 100644
>>>> --- a/hw/i386/intel_iommu.c
>>>> +++ b/hw/i386/intel_iommu.c
>>>> @@ -3500,6 +3500,11 @@ static bool
>>>> vtd_process_wait_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
>>>> } else if (inv_desc->lo & VTD_INV_DESC_WAIT_IF) {
>>>> /* Interrupt flag */
>>>> vtd_generate_completion_event(s);
>>>> + } else if (inv_desc->lo & VTD_INV_DESC_WAIT_FN) {
>>>> + /*
>>>> + * SW = 0, IF = 0, FN = 1
>>>> + * Nothing to do as we process the events sequentially
>>>> + */
>>>
>>> This code looks a bit weird. SW field does not co-exist with IF. But
>>> either
>>> SW or IF can co-exist with FN flag. Is it? Have you already seen a wait
>>> descriptor that only has FN flag set but no SW nor IF flag?
>> Yes, my test suite triggers that condition
>
> I see. Spec indeed has such usage. Please add a comment for it.
> Since it does not need a response, so QEMU can just bypass it. Also
> please adjust the subject a bit. It's misleading. Perhaps
>
> "intel_iommu: Bypass barrier wait descriptor"
Fine, will do
>
> Spec CH 7.10
> a. Submit Invalidation Wait Descriptor (inv_wait_dsc) with Fence flag
> (FN=1) Set to Invalidation
> Queue. This ensures that all requests submitted to the Invalidation
> Queue ahead of this wait
> descriptor are processed and completed by remapping hardware before
> processing requests
> after the Invalidation Wait Descriptor. It is not required to specify
> SW flag (or IF flag) in this
> descriptor or for software to wait on its completion, as its function
> is to only act as a barrier.
>
>>>
>>>> } else {
>>>> error_report_once("%s: invalid wait desc: hi=%"PRIx64",
>>>> lo=%"PRIx64
>>>> " (unknown type)", __func__,
>>>> inv_desc->hi,
>>>
>>> --
>>> Regards,
>>> Yi Liu
>
next prev parent reply other threads:[~2024-07-03 8:28 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-02 5:52 [PATCH ats_vtd v5 00/22] ATS support for VT-d CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 01/22] intel_iommu: fix FRCD construction macro CLEMENT MATHIEU--DRIF
2024-07-02 13:01 ` Yi Liu
2024-07-02 15:10 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 02/22] intel_iommu: make types match CLEMENT MATHIEU--DRIF
2024-07-02 13:20 ` Yi Liu
2024-07-02 5:52 ` [PATCH ats_vtd v5 03/22] intel_iommu: return page walk level even when the translation fails CLEMENT MATHIEU--DRIF
2024-07-03 11:59 ` Yi Liu
2024-07-04 4:23 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor CLEMENT MATHIEU--DRIF
2024-07-02 13:33 ` Yi Liu
2024-07-02 15:29 ` CLEMENT MATHIEU--DRIF
2024-07-02 15:40 ` cmd
2024-07-03 7:29 ` Yi Liu
2024-07-03 8:28 ` cmd [this message]
2024-07-04 4:23 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device CLEMENT MATHIEU--DRIF
2024-07-03 12:04 ` Yi Liu
2024-07-04 4:25 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 07/22] pcie: helper functions to check if PASID and ATS are enabled CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 08/22] intel_iommu: declare supported PASID size CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 09/22] pci: cache the bus mastering status in the device CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 10/22] pci: add IOMMU operations to get address spaces and memory regions with PASID CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 11/22] memory: store user data pointer in the IOMMU notifiers CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 12/22] pci: add a pci-level initialization function for iommu notifiers CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pasid iommu operation CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 15/22] memory: Allow to store the PASID in IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 14/22] intel_iommu: implement the get_memory_region_pasid iommu operation CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 16/22] intel_iommu: fill the PASID field when creating an instance of IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 17/22] atc: generic ATC that can be used by PCIe devices that support SVM CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 18/22] atc: add unit tests CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 19/22] memory: add an API for ATS support CLEMENT MATHIEU--DRIF
2024-07-03 12:14 ` Yi Liu
2024-07-04 4:30 ` CLEMENT MATHIEU--DRIF
2024-07-04 12:52 ` Yi Liu
2024-07-02 5:52 ` [PATCH ats_vtd v5 20/22] pci: add a pci-level API for ATS CLEMENT MATHIEU--DRIF
2024-07-09 10:15 ` Minwoo Im
2024-07-09 11:58 ` CLEMENT MATHIEU--DRIF
2024-07-09 21:17 ` Minwoo Im
2024-07-10 5:17 ` CLEMENT MATHIEU--DRIF
2024-07-11 8:04 ` Minwoo Im
2024-07-11 19:00 ` CLEMENT MATHIEU--DRIF
2024-07-17 23:44 ` Minwoo Im
2024-07-18 7:46 ` CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 21/22] intel_iommu: set the address mask even when a translation fails CLEMENT MATHIEU--DRIF
2024-07-02 5:52 ` [PATCH ats_vtd v5 22/22] intel_iommu: add support for ATS CLEMENT MATHIEU--DRIF
2024-07-02 12:16 ` [PATCH ats_vtd v5 00/22] ATS support for VT-d Michael S. Tsirkin
2024-07-02 15:09 ` CLEMENT MATHIEU--DRIF
2024-07-02 13:44 ` Yi Liu
2024-07-02 15:12 ` CLEMENT MATHIEU--DRIF
2024-07-03 12:32 ` Yi Liu
2024-07-04 4:36 ` CLEMENT MATHIEU--DRIF
2024-07-04 8:14 ` Yi Liu
-- strict thread matches above, loose matches on Subject: below --
2024-06-03 5:59 CLEMENT MATHIEU--DRIF
2024-06-03 5:59 ` [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor CLEMENT MATHIEU--DRIF
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