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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id gz18sm48213pjb.19.2021.05.24.10.05.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 May 2021 10:05:18 -0700 (PDT) Subject: Re: [PATCH 9/9] target/arm: Allow board models to specify initial NS VTOR To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20210520152840.24453-1-peter.maydell@linaro.org> <20210520152840.24453-10-peter.maydell@linaro.org> From: Richard Henderson Message-ID: <263a44a4-a890-31fc-ab51-33c519b704f5@linaro.org> Date: Mon, 24 May 2021 10:05:17 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210520152840.24453-10-peter.maydell@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/20/21 8:28 AM, Peter Maydell wrote: > Currently we allow board models to specify the initial value of the > Secure VTOR register, using an init-svtor property on the TYPE_ARMV7M > object which is plumbed through to the CPU. Allow board models to > also specify the initial value of the Non-secure VTOR via a similar > init-nsvtor property. > > Signed-off-by: Peter Maydell > --- > I admit to not having a publicly-visible use for this yet, but > it does bring the NSVTOR into line with both our handling of the > SVTOR and also with the hardware, which allows both to be set > via reset-time config signal inputs, as seen eg on the Cortex-M55: > https://developer.arm.com/documentation/101051/0002/Signal-descriptions/Reset-configuration-signals?lang=en > --- > include/hw/arm/armv7m.h | 2 ++ > target/arm/cpu.h | 2 ++ > hw/arm/armv7m.c | 7 +++++++ > target/arm/cpu.c | 10 ++++++++++ > 4 files changed, 21 insertions(+) Reviewed-by: Richard Henderson r~