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[24.113.145.216]) by smtp.gmail.com with ESMTPSA id q7sm842259pfn.23.2020.07.08.17.19.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jul 2020 17:19:10 -0700 (PDT) Subject: Re: [PATCH 09/21] target/xtensa: add DFP option, registers and opcodes To: Max Filippov References: <20200706234737.32378-1-jcmvbkbc@gmail.com> <20200706234737.32378-10-jcmvbkbc@gmail.com> <4fc60414-4b04-2402-3e72-50e77a7854b6@linaro.org> From: Richard Henderson Message-ID: <26e7179e-692c-9467-b2d2-c04c6f03b0db@linaro.org> Date: Wed, 8 Jul 2020 17:19:07 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::441; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 7/8/20 10:37 AM, Max Filippov wrote: > On Wed, Jul 8, 2020 at 9:25 AM Richard Henderson > wrote: >> >> On 7/6/20 4:47 PM, Max Filippov wrote: >>> +float64 HELPER(add_d)(CPUXtensaState *env, float64 a, float64 b) >>> +{ >>> + set_use_first_nan(true, &env->fp_status); >>> + return float64_add(a, b, &env->fp_status); >>> +} >>> + >>> float32 HELPER(add_s)(CPUXtensaState *env, float32 a, float32 b) >>> { >>> + set_use_first_nan(env->config->use_first_nan, &env->fp_status); >>> return float32_add(a, b, &env->fp_status); >>> } >> >> I think you can do better than to set the use_first_nan flag before every >> operation. > > And it was better, until I found that the rules for float64 are a > bit... peculiar. Do I read that right, > @@ -99,6 +103,7 @@ > XCHAL_OPTION(XCHAL_HAVE_CP, XTENSA_OPTION_COPROCESSOR) | \ > XCHAL_OPTION(XCHAL_HAVE_BOOLEANS, XTENSA_OPTION_BOOLEAN) | \ > XCHAL_OPTION(XCHAL_HAVE_FP, XTENSA_OPTION_FP_COPROCESSOR) | \ > + XCHAL_OPTION(XCHAL_HAVE_DFP, XTENSA_OPTION_DFP_COPROCESSOR) | \ > XCHAL_OPTION(XCHAL_HAVE_RELEASE_SYNC, XTENSA_OPTION_MP_SYNCHRO) | \ > XCHAL_OPTION(XCHAL_HAVE_S32C1I, XTENSA_OPTION_CONDITIONAL_STORE) | \ > XCHAL_OPTION(((XCHAL_HAVE_S32C1I && XCHAL_HW_VERSION >= 230000) || \ > @@ -515,6 +520,7 @@ > .ndepc = (XCHAL_XEA_VERSION >= 2), \ > .inst_fetch_width = XCHAL_INST_FETCH_WIDTH, \ > .max_insn_size = XCHAL_MAX_INSTRUCTION_SIZE, \ > + .use_first_nan = !XCHAL_HAVE_DFP, \ > EXCEPTIONS_SECTION, \ > INTERRUPTS_SECTION, \ > TLB_SECTION, \ means that if DFP is present, float64 has use_first_nan, but float32 does not?!? What in the world is going on? >> E.g. the translator could remember the previous setting within the TB, only >> changing when necessary. E.g. if env->config->use_first_nan, then set it >> during reset and never change it again. Similarly if DFP is not enabled. > > This thought crossed my mind too, but then set_use_first_nan only > sets one variable in the float_status and gets inlined. > Is it worth the trouble? You have a point that the operation I'm trying to avoid is trivial, and probably not worth much. But I had hoped that a given cpu would stick with one method and not change it. r~