From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Bin Meng <bmeng.cn@gmail.com>,
Mauro Matteo Cascella <mcascell@redhat.com>,
Li Qiang <liq3ea@163.com>, Alexander Bulekov <alxndr@bu.edu>,
Alistair Francis <alistair.francis@wdc.com>,
Prasad J Pandit <ppandit@redhat.com>, Bandan Das <bsd@redhat.com>
Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-stable@nongnu.org
Subject: Re: [PATCH v2 2/6] hw/sd: sdhci: Don't write to SDHC_SYSAD register when transfer is in progress
Date: Thu, 18 Feb 2021 19:23:32 +0100 [thread overview]
Message-ID: <277459ba-f35c-31fb-c088-def282c841d4@amsat.org> (raw)
In-Reply-To: <1613447214-81951-3-git-send-email-bmeng.cn@gmail.com>
On 2/16/21 4:46 AM, Bin Meng wrote:
> Per "SD Host Controller Standard Specification Version 7.00"
> chapter 2.2.1 SDMA System Address Register:
>
> This register can be accessed only if no transaction is executing
> (i.e., after a transaction has stopped).
>
> With this fix, the following reproducer:
>
> https://paste.debian.net/plain/1185137
>
> cannot be reproduced with the following QEMU command line:
>
> $ qemu-system-x86_64 -nographic -machine accel=qtest -m 512M \
> -nodefaults -device sdhci-pci,sd-spec-version=3 \
> -drive if=sd,index=0,file=null-co://,format=raw,id=mydrive \
> -device sd-card,drive=mydrive -qtest stdio
Without the rest applied, I still can :(
AddressSanitizer: heap-buffer-overflow
next prev parent reply other threads:[~2021-02-18 18:24 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-16 3:46 [PATCH v2 0/6] hw/sd: sdhci: Fixes to CVE-2020-17380, CVE-2020-25085, CVE-2021-3409 Bin Meng
2021-02-16 3:46 ` [PATCH v2 1/6] hw/sd: sdhci: Don't transfer any data when command time out Bin Meng
2021-02-18 16:25 ` Philippe Mathieu-Daudé
2021-02-18 16:46 ` Philippe Mathieu-Daudé
2021-02-18 23:33 ` Bin Meng
2021-02-16 3:46 ` [PATCH v2 2/6] hw/sd: sdhci: Don't write to SDHC_SYSAD register when transfer is in progress Bin Meng
2021-02-18 16:33 ` Philippe Mathieu-Daudé
2021-02-18 18:23 ` Philippe Mathieu-Daudé [this message]
2021-02-18 20:31 ` Philippe Mathieu-Daudé
2021-02-16 3:46 ` [PATCH v2 3/6] hw/sd: sdhci: Correctly set the controller status for ADMA Bin Meng
2021-02-18 16:50 ` Philippe Mathieu-Daudé
2021-02-16 3:46 ` [PATCH v2 4/6] hw/sd: sdhci: Simplify updating s->prnsts in sdhci_sdma_transfer_multi_blocks() Bin Meng
2021-02-17 15:39 ` Alexander Bulekov
2021-02-18 16:51 ` Philippe Mathieu-Daudé
2021-02-19 23:15 ` Philippe Mathieu-Daudé
2021-02-16 3:46 ` [PATCH v2 5/6] hw/sd: sdhci: Limit block size only when SDHC_BLKSIZE register is writable Bin Meng
2021-02-18 17:09 ` Philippe Mathieu-Daudé
2021-02-18 18:03 ` Philippe Mathieu-Daudé
2021-02-20 6:55 ` Bin Meng
2021-02-16 3:46 ` [PATCH v2 6/6] hw/sd: sdhci: Reset the data pointer of s->fifo_buffer[] when a different block size is programmed Bin Meng
2021-02-18 18:06 ` Philippe Mathieu-Daudé
2021-02-20 3:28 ` Bin Meng
2021-02-16 16:13 ` [PATCH v2 0/6] hw/sd: sdhci: Fixes to CVE-2020-17380, CVE-2020-25085, CVE-2021-3409 Alexander Bulekov
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