From: Laurent Vivier <laurent@vivier.eu>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
qemu-devel@nongnu.org, pbonzini@redhat.com, fam@euphon.net
Subject: Re: [PATCH v2 32/42] esp: latch individual bits in ESP_RINTR register
Date: Wed, 3 Mar 2021 20:48:34 +0100 [thread overview]
Message-ID: <277c8be7-c7a7-f8d7-fe9f-b4cf12a4896a@vivier.eu> (raw)
In-Reply-To: <20210209193018.31339-33-mark.cave-ayland@ilande.co.uk>
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> Currently the ESP_RINTR register is set to a specific value as required within
> the ESP state machine. In order to implement the upcoming deferred interrupt
> functionality it is necessary to set individual bits within ESP_RINTR so that
> a deferred interrupt will not overwrite the value of any other interrupt bits.
>
> This also requires fixing up a few locations where the ESP_RINTR and ESP_RSEQ
> registers are set/reset unexpectedly.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/scsi/esp.c | 29 +++++++++++++----------------
> 1 file changed, 13 insertions(+), 16 deletions(-)
>
> diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
> index 0994673ff8..728d4ddf99 100644
> --- a/hw/scsi/esp.c
> +++ b/hw/scsi/esp.c
> @@ -178,7 +178,7 @@ static int esp_select(ESPState *s)
> if (!s->current_dev) {
> /* No such drive */
> s->rregs[ESP_RSTAT] = 0;
> - s->rregs[ESP_RINTR] = INTR_DC;
> + s->rregs[ESP_RINTR] |= INTR_DC;
> s->rregs[ESP_RSEQ] = SEQ_0;
> esp_raise_irq(s);
> return -1;
> @@ -245,7 +245,7 @@ static void do_busid_cmd(ESPState *s, uint8_t *buf, uint8_t busid)
> }
> scsi_req_continue(s->current_req);
> }
> - s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
> + s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
> s->rregs[ESP_RSEQ] = SEQ_CD;
> esp_raise_irq(s);
> esp_lower_drq(s);
> @@ -326,7 +326,7 @@ static void satn_stop_pdma_cb(ESPState *s)
> trace_esp_handle_satn_stop(s->cmdlen);
> s->do_cmd = 1;
> s->rregs[ESP_RSTAT] = STAT_TC | STAT_CD;
> - s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
> + s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
> s->rregs[ESP_RSEQ] = SEQ_CD;
> esp_raise_irq(s);
> }
> @@ -346,8 +346,8 @@ static void handle_satn_stop(ESPState *s)
> trace_esp_handle_satn_stop(s->cmdlen);
> s->cmdlen = cmdlen;
> s->do_cmd = 1;
> - s->rregs[ESP_RSTAT] = STAT_TC | STAT_CD;
> - s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
> + s->rregs[ESP_RSTAT] = STAT_CD;
> + s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
> s->rregs[ESP_RSEQ] = SEQ_CD;
> esp_raise_irq(s);
> } else if (cmdlen == 0) {
> @@ -362,7 +362,7 @@ static void handle_satn_stop(ESPState *s)
> static void write_response_pdma_cb(ESPState *s)
> {
> s->rregs[ESP_RSTAT] = STAT_TC | STAT_ST;
> - s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
> + s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
> s->rregs[ESP_RSEQ] = SEQ_CD;
> esp_raise_irq(s);
> }
> @@ -376,7 +376,7 @@ static void write_response(ESPState *s)
> if (s->dma_memory_write) {
> s->dma_memory_write(s->dma_opaque, s->ti_buf, 2);
> s->rregs[ESP_RSTAT] = STAT_TC | STAT_ST;
> - s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
> + s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
> s->rregs[ESP_RSEQ] = SEQ_CD;
> } else {
> s->pdma_cb = write_response_pdma_cb;
> @@ -395,7 +395,7 @@ static void write_response(ESPState *s)
> static void esp_dma_done(ESPState *s)
> {
> s->rregs[ESP_RSTAT] |= STAT_TC;
> - s->rregs[ESP_RINTR] = INTR_BS;
> + s->rregs[ESP_RINTR] |= INTR_BS;
> s->rregs[ESP_RSEQ] = 0;
> s->rregs[ESP_RFLAGS] = 0;
> esp_set_tc(s, 0);
> @@ -701,7 +701,7 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
> val = s->rregs[ESP_RINTR];
> s->rregs[ESP_RINTR] = 0;
> s->rregs[ESP_RSTAT] &= ~STAT_TC;
> - s->rregs[ESP_RSEQ] = SEQ_CD;
> + s->rregs[ESP_RSEQ] = SEQ_0;
> esp_lower_irq(s);
> if (s->deferred_complete) {
> esp_report_command_complete(s, s->deferred_status);
> @@ -772,9 +772,6 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
> /*s->ti_size = 0;*/
> s->ti_wptr = 0;
> s->ti_rptr = 0;
> - s->rregs[ESP_RINTR] = INTR_FC;
> - s->rregs[ESP_RSEQ] = 0;
> - s->rregs[ESP_RFLAGS] = 0;
> break;
> case CMD_RESET:
> trace_esp_mem_writeb_cmd_reset(val);
> @@ -782,8 +779,8 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
> break;
> case CMD_BUSRESET:
> trace_esp_mem_writeb_cmd_bus_reset(val);
> - s->rregs[ESP_RINTR] = INTR_RST;
> if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) {
> + s->rregs[ESP_RINTR] |= INTR_RST;
> esp_raise_irq(s);
> }
> break;
> @@ -794,12 +791,12 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
> case CMD_ICCS:
> trace_esp_mem_writeb_cmd_iccs(val);
> write_response(s);
> - s->rregs[ESP_RINTR] = INTR_FC;
> + s->rregs[ESP_RINTR] |= INTR_FC;
> s->rregs[ESP_RSTAT] |= STAT_MI;
> break;
> case CMD_MSGACC:
> trace_esp_mem_writeb_cmd_msgacc(val);
> - s->rregs[ESP_RINTR] = INTR_DC;
> + s->rregs[ESP_RINTR] |= INTR_DC;
> s->rregs[ESP_RSEQ] = 0;
> s->rregs[ESP_RFLAGS] = 0;
> esp_raise_irq(s);
> @@ -807,7 +804,7 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
> case CMD_PAD:
> trace_esp_mem_writeb_cmd_pad(val);
> s->rregs[ESP_RSTAT] = STAT_TC;
> - s->rregs[ESP_RINTR] = INTR_FC;
> + s->rregs[ESP_RINTR] |= INTR_FC;
> s->rregs[ESP_RSEQ] = 0;
> break;
> case CMD_SATN:
>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
next prev parent reply other threads:[~2021-03-03 19:49 UTC|newest]
Thread overview: 135+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 19:29 [PATCH v2 00/42] esp: consolidate PDMA transfer buffers and other fixes Mark Cave-Ayland
2021-02-09 19:29 ` [PATCH v2 01/42] esp: checkpatch fixes Mark Cave-Ayland
2021-03-01 19:43 ` Laurent Vivier
2021-03-03 8:33 ` Mark Cave-Ayland
2021-02-09 19:29 ` [PATCH v2 02/42] esp: rename existing ESP QOM type to SYSBUS_ESP Mark Cave-Ayland
2021-02-10 22:29 ` Philippe Mathieu-Daudé
2021-03-01 19:52 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 03/42] esp: QOMify the internal ESP device state Mark Cave-Ayland
2021-02-12 18:51 ` Philippe Mathieu-Daudé
2021-02-15 22:29 ` Mark Cave-Ayland
2021-03-01 20:11 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 04/42] esp: add vmstate_esp version to embedded ESPState Mark Cave-Ayland
2021-02-16 7:35 ` Philippe Mathieu-Daudé
2021-03-01 20:21 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 05/42] esp: add trace event when receiving a TI command Mark Cave-Ayland
2021-03-01 20:24 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 06/42] esp: fix esp_reg_read() trace event Mark Cave-Ayland
2021-03-01 20:29 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 07/42] esp: add PDMA trace events Mark Cave-Ayland
2021-03-01 20:32 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 08/42] esp: determine transfer direction directly from SCSI phase Mark Cave-Ayland
2021-02-16 7:36 ` Philippe Mathieu-Daudé
2021-03-01 21:18 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 09/42] esp: introduce esp_get_tc() and esp_set_tc() Mark Cave-Ayland
2021-03-01 21:24 ` Laurent Vivier
2021-03-03 8:35 ` Mark Cave-Ayland
2021-02-09 19:29 ` [PATCH v2 10/42] esp: introduce esp_get_stc() Mark Cave-Ayland
2021-02-10 22:33 ` Philippe Mathieu-Daudé
2021-02-11 7:53 ` Mark Cave-Ayland
2021-02-11 10:07 ` Philippe Mathieu-Daudé
2021-02-15 22:27 ` Mark Cave-Ayland
2021-03-01 21:28 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 11/42] esp: apply transfer length adjustment when STC is zero at TC load time Mark Cave-Ayland
2021-02-16 7:33 ` Philippe Mathieu-Daudé
2021-02-16 21:52 ` Mark Cave-Ayland
2021-03-01 21:35 ` Laurent Vivier
2021-03-03 8:44 ` Mark Cave-Ayland
2021-02-09 19:29 ` [PATCH v2 12/42] esp: remove dma_counter from ESPState Mark Cave-Ayland
2021-02-10 22:37 ` Philippe Mathieu-Daudé
2021-03-01 21:44 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 13/42] esp: remove dma_left " Mark Cave-Ayland
2021-02-23 21:22 ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 14/42] esp: remove minlen restriction in handle_ti Mark Cave-Ayland
2021-02-23 18:24 ` Philippe Mathieu-Daudé
2021-03-01 22:04 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 15/42] esp: introduce esp_pdma_read() and esp_pdma_write() functions Mark Cave-Ayland
2021-02-10 22:51 ` Philippe Mathieu-Daudé
2021-02-11 8:01 ` Mark Cave-Ayland
2021-02-11 10:09 ` Philippe Mathieu-Daudé
2021-03-01 22:06 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 16/42] esp: use pdma_origin directly in esp_pdma_read()/esp_pdma_write() Mark Cave-Ayland
2021-02-23 18:25 ` Philippe Mathieu-Daudé
2021-03-01 22:07 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 17/42] esp: move pdma_len and TC logic into esp_pdma_read()/esp_pdma_write() Mark Cave-Ayland
2021-02-23 21:23 ` Philippe Mathieu-Daudé
2021-03-01 22:09 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 18/42] esp: accumulate SCSI commands for PDMA transfers in cmdbuf instead of pdma_buf Mark Cave-Ayland
2021-02-23 21:25 ` Philippe Mathieu-Daudé
2021-03-02 17:02 ` Laurent Vivier
2021-03-02 17:34 ` Mark Cave-Ayland
2021-03-02 17:59 ` Laurent Vivier
2021-03-02 19:29 ` Mark Cave-Ayland
2021-03-02 21:21 ` Laurent Vivier
2021-03-02 21:22 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 19/42] esp: remove buf parameter from do_cmd() Mark Cave-Ayland
2021-02-23 18:27 ` Philippe Mathieu-Daudé
2021-03-02 17:03 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 20/42] esp: remove the buf and buflen parameters from get_cmd() Mark Cave-Ayland
2021-02-16 7:31 ` Philippe Mathieu-Daudé
2021-03-02 17:03 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 21/42] esp: remove redundant pdma_start from ESPState Mark Cave-Ayland
2021-03-02 21:22 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 22/42] esp: move PDMA length adjustments into esp_pdma_read()/esp_pdma_write() Mark Cave-Ayland
2021-03-02 21:44 ` Laurent Vivier
2021-02-09 19:29 ` [PATCH v2 23/42] esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA Mark Cave-Ayland
2021-02-23 21:29 ` Philippe Mathieu-Daudé
2021-03-02 21:47 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 24/42] esp: use in-built TC to determine PDMA transfer length Mark Cave-Ayland
2021-02-23 18:32 ` Philippe Mathieu-Daudé
2021-03-02 21:48 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 25/42] esp: remove CMD pdma_origin Mark Cave-Ayland
2021-02-23 18:34 ` Philippe Mathieu-Daudé
2021-03-02 21:49 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 26/42] esp: rename get_cmd_cb() to esp_select() Mark Cave-Ayland
2021-03-02 21:51 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 27/42] esp: fix PDMA target selection Mark Cave-Ayland
2021-03-02 21:57 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 28/42] esp: use FIFO for PDMA transfers between initiator and device Mark Cave-Ayland
2021-03-02 22:02 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 29/42] esp: remove pdma_origin from ESPState Mark Cave-Ayland
2021-03-02 22:03 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers Mark Cave-Ayland
2021-02-12 18:56 ` Philippe Mathieu-Daudé
2021-02-15 22:35 ` Mark Cave-Ayland
2021-02-16 7:30 ` Philippe Mathieu-Daudé
2021-02-16 21:36 ` Mark Cave-Ayland
2021-02-23 8:24 ` Mark Cave-Ayland
2021-02-23 18:55 ` Philippe Mathieu-Daudé
2021-03-02 22:05 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 31/42] esp: implement FIFO flush command Mark Cave-Ayland
2021-03-03 19:32 ` Laurent Vivier
2021-03-04 18:26 ` Mark Cave-Ayland
2021-02-09 19:30 ` [PATCH v2 32/42] esp: latch individual bits in ESP_RINTR register Mark Cave-Ayland
2021-03-03 19:48 ` Laurent Vivier [this message]
2021-02-09 19:30 ` [PATCH v2 33/42] esp: defer command completion interrupt on incoming data transfers Mark Cave-Ayland
2021-02-18 17:25 ` Mark Cave-Ayland
2021-03-03 19:52 ` Laurent Vivier
2021-03-04 18:33 ` Mark Cave-Ayland
2021-02-09 19:30 ` [PATCH v2 34/42] esp: remove old deferred command completion mechanism Mark Cave-Ayland
2021-03-03 19:55 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 35/42] esp: raise interrupt after every non-DMA byte transferred to the FIFO Mark Cave-Ayland
2021-03-03 19:59 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 36/42] esp: add maxlen parameter to get_cmd() Mark Cave-Ayland
2021-02-23 18:43 ` Philippe Mathieu-Daudé
2021-03-03 20:04 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 37/42] esp: transition to message out phase after SATN and stop command Mark Cave-Ayland
2021-03-03 20:06 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 38/42] esp: convert ti_buf from array to Fifo8 Mark Cave-Ayland
2021-02-23 18:49 ` Philippe Mathieu-Daudé
2021-02-25 9:15 ` Mark Cave-Ayland
2021-03-03 20:11 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 39/42] esp: convert cmdbuf " Mark Cave-Ayland
2021-03-03 20:16 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 40/42] esp: add trivial implementation of the ESP_RFLAGS register Mark Cave-Ayland
2021-02-23 18:51 ` Philippe Mathieu-Daudé
2021-03-03 20:19 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 41/42] esp: implement non-DMA transfers in PDMA mode Mark Cave-Ayland
2021-03-03 20:22 ` Laurent Vivier
2021-02-09 19:30 ` [PATCH v2 42/42] esp: add support for unaligned accesses Mark Cave-Ayland
2021-03-03 20:22 ` Laurent Vivier
2021-02-23 21:32 ` [PATCH v2 00/42] esp: consolidate PDMA transfer buffers and other fixes Philippe Mathieu-Daudé
2021-02-25 9:54 ` Mark Cave-Ayland
2021-02-25 10:50 ` Philippe Mathieu-Daudé
2021-02-25 19:17 ` Mark Cave-Ayland
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