Re: [PATCH] linux-user/sparc64: Translate flushw opcode

[Richard Henderson <richard.henderson@linaro.org>]

On 4/10/20 2:14 PM, LemonBoy wrote:
> From 11d0cfe58d12e0f191b435ade88622cfceb2098a Mon Sep 17 00:00:00 2001
> From: LemonBoy <thatlemon@gmail.com>
> Date: Fri, 10 Apr 2020 22:55:26 +0200
> Subject: [PATCH] linux-user/sparc64: Translate flushw opcode
> 
> The ifdef logic should unconditionally compile in the `xop == 0x2b` case
> when targeting sparc64.
> 
> Fix the handling of window spill traps by keeping cansave into account
> when calculating the new CWP.

This is two separate fixes and should be two separate patches.

>  bsd-user/main.c             | 4 +++-
>  linux-user/sparc/cpu_loop.c | 4 +++-

First patch,

>  target/sparc/translate.c    | 2 ++
>  3 files changed, 8 insertions(+), 2 deletions(-)

Second patch.

> +    /* cansave is zero if the spill trap handler is triggered by `save` and */
> +    /* nonzero if triggered by a `flushw` */

Format the comment like so:

    /*
     * cansave is zero...
     * nonzero if ...
     */

> +    save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));

But this does match the implementation in sparc_cpu_do_interrupt, so the change
is good.

> diff --git a/target/sparc/translate.c b/target/sparc/translate.c
> index 9416a551cf..1a4efd4ed6 100644
> --- a/target/sparc/translate.c
> +++ b/target/sparc/translate.c
> @@ -3663,6 +3663,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
>  #endif
>                  gen_store_gpr(dc, rd, cpu_tmp0);
>                  break;
> +#endif
> +#if defined(TARGET_SPARC64) || !defined(CONFIG_USER_ONLY)
>              } else if (xop == 0x2b) { /* rdtbr / V9 flushw */
>  #ifdef TARGET_SPARC64
>                  gen_helper_flushw(cpu_env);

Look ok here too.


r~