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[88.26.246.243]) by smtp.gmail.com with ESMTPSA id v20sm2296849wml.26.2019.10.17.08.59.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Oct 2019 08:59:22 -0700 (PDT) Subject: Re: [PATCH 1/8] hw/timer/puv3_ost.c: Switch to transaction-based ptimer API To: Peter Maydell , qemu-devel@nongnu.org References: <20191017132905.5604-1-peter.maydell@linaro.org> <20191017132905.5604-2-peter.maydell@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <2808edfa-a837-de78-487f-0ae15c13d797@redhat.com> Date: Thu, 17 Oct 2019 17:59:21 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20191017132905.5604-2-peter.maydell@linaro.org> Content-Language: en-US X-MC-Unique: 8_nOJM5WMy26RFKbLaIYyA-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , "Edgar E. Iglesias" , Michael Walle , Guan Xuetao , Magnus Damm Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/17/19 3:28 PM, Peter Maydell wrote: > Switch the puv3_ost code away from bottom-half based ptimers to the > new transaction-based ptimer API. This just requires adding > begin/commit calls around the various places that modify the ptimer > state, and using the new ptimer_init() function to create the timer. >=20 > Signed-off-by: Peter Maydell > --- > hw/timer/puv3_ost.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) >=20 > diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c > index 0898da5ce97..697519593bb 100644 > --- a/hw/timer/puv3_ost.c > +++ b/hw/timer/puv3_ost.c > @@ -13,7 +13,6 @@ > #include "hw/sysbus.h" > #include "hw/irq.h" > #include "hw/ptimer.h" > -#include "qemu/main-loop.h" > #include "qemu/module.h" > =20 > #undef DEBUG_PUV3 > @@ -27,7 +26,6 @@ typedef struct PUV3OSTState { > SysBusDevice parent_obj; > =20 > MemoryRegion iomem; > - QEMUBH *bh; > qemu_irq irq; > ptimer_state *ptimer; > =20 > @@ -68,6 +66,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset, > DPRINTF("offset 0x%x, value 0x%x\n", offset, value); > switch (offset) { > case 0x00: /* Match Register 0 */ > + ptimer_transaction_begin(s->ptimer); > s->reg_OSMR0 =3D value; > if (s->reg_OSMR0 > s->reg_OSCR) { > ptimer_set_count(s->ptimer, s->reg_OSMR0 - s->reg_OSCR); > @@ -76,6 +75,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset, > (0xffffffff - s->reg_OSCR)); > } > ptimer_run(s->ptimer, 2); > + ptimer_transaction_commit(s->ptimer); > break; > case 0x14: /* Status Register */ > assert(value =3D=3D 0); > @@ -128,9 +128,10 @@ static void puv3_ost_realize(DeviceState *dev, Error= **errp) > =20 > sysbus_init_irq(sbd, &s->irq); > =20 > - s->bh =3D qemu_bh_new(puv3_ost_tick, s); > - s->ptimer =3D ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT); > + s->ptimer =3D ptimer_init(puv3_ost_tick, s, PTIMER_POLICY_DEFAULT); > + ptimer_transaction_begin(s->ptimer); > ptimer_set_freq(s->ptimer, 50 * 1000 * 1000); > + ptimer_transaction_commit(s->ptimer); > =20 > memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3= _ost", > PUV3_REGS_OFFSET); >=20 Reviewed-by: Philippe Mathieu-Daud=C3=A9