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[83.59.163.96]) by smtp.gmail.com with ESMTPSA id y8sm4394637wrr.16.2020.03.18.10.06.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Mar 2020 10:06:03 -0700 (PDT) Subject: Re: [PATCH] pci: Display PCI IRQ pin in "info pci" To: Peter Xu , Eric Blake References: <20200317195908.283800-1-peterx@redhat.com> <6beb4b5d-91c6-2536-64ab-18217be71134@redhat.com> <20200317201153.GB233068@xz-x1> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <2847e5da-4cc3-8273-f51f-86b0995943de@redhat.com> Date: Wed, 18 Mar 2020 18:06:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200317201153.GB233068@xz-x1> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 63.128.21.74 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" , Julia Suvorova , qemu-devel@nongnu.org, Markus Armbruster , Alex Williamson , "Dr . David Alan Gilbert" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/17/20 9:11 PM, Peter Xu wrote: > On Tue, Mar 17, 2020 at 03:02:57PM -0500, Eric Blake wrote: >> On 3/17/20 2:59 PM, Peter Xu wrote: >>> Sometimes it would be good to be able to read the pin number along >>> with the IRQ number allocated. Since we'll dump the IRQ number, no >>> reason to not dump the pin information. For example, the vfio-pci >>> device will overwrite the pin with the hardware pin number. It would >>> be nice to know the pin number of one assigned device from QMP/HMP. >>> >>> CC: Dr. David Alan Gilbert >>> CC: Alex Williamson >>> CC: Michael S. Tsirkin >>> CC: Marcel Apfelbaum >>> CC: Julia Suvorova >>> CC: Markus Armbruster >>> Signed-off-by: Peter Xu >>> --- >>> >>> This helped me to debug an IRQ sharing issue, so may good to have it >>> in master too. >> >> We're right at soft freeze. >> >> >>> +++ b/qapi/misc.json >>> @@ -403,6 +403,8 @@ >>> # >>> # @irq: if an IRQ is assigned to the device, the IRQ number >>> # >>> +# @irq_pin: the IRQ pin, zero means no IRQ (since 5.1) >>> +# >> >> But if we really do want it in 5.0, this needs a tweak. Does the delay >> hurt? >=20 > No it won't; it's something good to have only. I'll let the > maintainers to decide... >=20 >> >> Naming convention: We prefer unless there is a consistency >> issue.... >> >>> # @qdev_id: the device name of the PCI device >>> # >>> # @pci_bridge: if the device is a PCI bridge, the bridge information >>> @@ -417,8 +419,8 @@ >>> { 'struct': 'PciDeviceInfo', >>> 'data': {'bus': 'int', 'slot': 'int', 'function': 'int', >>> 'class_info': 'PciDeviceClass', 'id': 'PciDeviceId', >>> - '*irq': 'int', 'qdev_id': 'str', '*pci_bridge': 'PciBridgeI= nfo', >>> - 'regions': ['PciMemoryRegion']} } >>> + '*irq': 'int', 'irq_pin': 'int', 'qdev_id': 'str', >>> + '*pci_bridge': 'PciBridgeInfo', 'regions': ['PciMemoryRegio= n'] }} >> >> and the pre-existing pci_bridge is indeed the consistency issue. >=20 > Yeh, actually every key in this struct. :) Using 'irq-pin': Reviewed-by: Philippe Mathieu-Daud=C3=A9 >=20 > Thanks, >=20