From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair.francis@wdc.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: alistair23@gmail.com, bmeng.cn@gmail.com, palmer@dabbelt.com
Subject: Re: [PATCH v3 2/7] target/riscv: Add a virtualised MMU Mode
Date: Tue, 3 Nov 2020 12:20:27 -0800 [thread overview]
Message-ID: <29320e1d-6abf-a6bb-fc6e-43a3b17fca36@linaro.org> (raw)
In-Reply-To: <5f25069661040bb96f945358bd7fa047f5b462ce.1604432950.git.alistair.francis@wdc.com>
On 11/3/20 11:50 AM, Alistair Francis wrote:
> @@ -30,6 +30,10 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
> #ifdef CONFIG_USER_ONLY
> return 0;
> #else
> + if (riscv_cpu_virt_enabled(env)) {
> + return env->priv | TB_FLAGS_PRIV_HYP_ACCESS_MASK;
> + }
Still setting this bit here, incorrectly.
r~
next prev parent reply other threads:[~2020-11-03 20:21 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-03 19:50 [PATCH v3 0/7] Fix the Hypervisor access functions Alistair Francis
2020-11-03 19:50 ` [PATCH v3 1/7] target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit Alistair Francis
2020-11-03 19:52 ` Alistair Francis
2020-11-03 20:19 ` Richard Henderson
2020-11-03 19:50 ` [PATCH v3 2/7] target/riscv: Add a virtualised MMU Mode Alistair Francis
2020-11-03 20:20 ` Richard Henderson [this message]
2020-11-04 4:42 ` Alistair Francis
2020-11-03 19:51 ` [PATCH v3 3/7] target/riscv: Set the virtualised MMU mode when doing hyp accesses Alistair Francis
2020-11-03 19:51 ` [PATCH v3 4/7] target/riscv: Remove the HS_TWO_STAGE flag Alistair Francis
2020-11-03 19:51 ` [PATCH v3 5/7] target/riscv: Remove the hyp load and store functions Alistair Francis
2020-11-03 19:51 ` [PATCH v3 6/7] target/riscv: Remove the Hypervisor access check function Alistair Francis
2020-11-03 20:26 ` Richard Henderson
2020-11-03 19:51 ` [PATCH v3 7/7] target/riscv: Split the Hypervisor execute load helpers Alistair Francis
2020-11-03 20:27 ` Richard Henderson
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