From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Tokarev <mjt@tls.msk.ru>,
info@mobile-stream.com, qemu-trivial@nongnu.org,
qemu-devel@nongnu.org,
"qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>
Subject: Re: [Qemu-devel] fix evsrwu and others for powerpcspe
Date: Sat, 10 Feb 2018 09:19:55 -0800 [thread overview]
Message-ID: <29427bc8-d37d-a20c-e0ed-aaebffd1c265@linaro.org> (raw)
In-Reply-To: <751c9675-7e93-a907-4b9e-998c50155e84@msgid.tls.msk.ru>
On 02/09/2018 11:25 PM, Michael Tokarev wrote:
> 26.12.2017 14:29, info@mobile-stream.com wrote:
>> GEN_SPEOP_ARITH2 declares non-local temporaries then calls gen_op_evsrwu/evsrws/evslw which generates branch insn.
>
> I'm Cc'ing qemu-devel@ for review, since I don't know much about how ppc works.
>
> Thanks,
>
> /mjt
>
>> --- target/ppc/translate/spe-impl.inc.c.orig
>> +++ target/ppc/translate/spe-impl.inc.c
>> @@ -158,8 +158,8 @@
>> gen_exception(ctx, POWERPC_EXCP_SPEU); \
>> return; \
>> } \
>> - t0 = tcg_temp_new_i32(); \
>> - t1 = tcg_temp_new_i32(); \
>> + t0 = tcg_temp_local_new_i32(); \
>> + t1 = tcg_temp_local_new_i32(); \
While that's one possible solution, it would be better to rewrite the helpers
not to use branches. E.g.
tcg_gen_andi_i32(t0, arg2, 0x1f);
tcg_gen_andi_i32(t1, arg2, 0x20);
tcg_gen_shr_i32(ret, arg1, t0);
tcg_gen_movi_i32(t0, 0);
tcg_gen_movcond_i32(TCG_COND_NE, ret, t1, t0, t0, ret);
r~
prev parent reply other threads:[~2018-02-10 17:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1954640316.20171226142913@mobile-stream.com>
2018-02-10 7:25 ` [Qemu-devel] fix evsrwu and others for powerpcspe Michael Tokarev
2018-02-10 7:44 ` Thomas Huth
2018-02-10 17:19 ` Richard Henderson [this message]
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