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From: Bui Quang Minh <minhquangbui99@gmail.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org, "David Woodhouse" <dwmw2@infradead.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Joao Martins" <joao.m.martins@oracle.com>,
	"Peter Xu" <peterx@redhat.com>,
	"Jason Wang" <jasowang@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Phil Dennis-Jordan" <lists@philjordan.eu>
Subject: Re: [PATCH v9 5/5] amd_iommu: report x2APIC support to the operating system
Date: Thu, 9 Nov 2023 21:12:07 +0700	[thread overview]
Message-ID: <2992a952-a444-411e-bdde-4de89498af23@gmail.com> (raw)
In-Reply-To: <20231108144325-mutt-send-email-mst@kernel.org>

On 11/9/23 02:44, Michael S. Tsirkin wrote:
> On Wed, Nov 08, 2023 at 09:22:18PM +0700, Bui Quang Minh wrote:
>> On 11/7/23 07:39, Michael S. Tsirkin wrote:
>>> On Tue, Oct 24, 2023 at 10:21:05PM +0700, Bui Quang Minh wrote:
>>>> This commit adds XTSup configuration to let user choose to whether enable
>>>> this feature or not. When XTSup is enabled, additional bytes in IRTE with
>>>> enabled guest virtual VAPIC are used to support 32-bit destination id.
>>>>
>>>> Additionally, this commit exports IVHD type 0x11 besides the old IVHD type
>>>> 0x10 in ACPI table. IVHD type 0x10 does not report full set of IOMMU
>>>> features only the legacy ones, so operating system (e.g. Linux) may only
>>>> detects x2APIC support if IVHD type 0x11 is available. The IVHD type 0x10
>>>> is kept so that old operating system that only parses type 0x10 can detect
>>>> the IOMMU device.
>>>>
>>>> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
>>>> Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com>
>>>
>>>
>>> changes IVRS without updating expected files for tests.
>>> result seems to be CI failures:
>>> https://gitlab.com/mstredhat/qemu/-/jobs/5470533834
>>
>>
>> Thanks Michael, I am preparing the fix in the next version. I've read the
>> instructions to update the test data in bios-tables-test.c. It says I need
>> to create some separate patches to update the test data. Are there any
>> reasons for this? I intend to change the binary and include the ASL diff
>> into the commit message. Is it enough?
> 
> No, not enough.  No, do not ignore the rules please.  Yes, there's a
> reason.  The reason is that I need to be able to rebase your patches.  I
> then regenerate the binaries. If the patch includes binaries it won't
> rebase.

Okay, I got it. I will prepare the fix in the next version.

Thanks,
Quang Minh.


  reply	other threads:[~2023-11-09 14:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-24 15:21 [PATCH v9 0/5] Support x2APIC mode with TCG accelerator Bui Quang Minh
2023-10-24 15:21 ` [PATCH v9 1/5] i386/tcg: implement x2APIC registers MSR access Bui Quang Minh
2023-10-24 15:21 ` [PATCH v9 2/5] apic: add support for x2APIC mode Bui Quang Minh
2023-10-24 15:21 ` [PATCH v9 3/5] apic, i386/tcg: add x2apic transitions Bui Quang Minh
2023-10-24 15:21 ` [PATCH v9 4/5] intel_iommu: allow Extended Interrupt Mode when using userspace APIC Bui Quang Minh
2023-10-24 15:21 ` [PATCH v9 5/5] amd_iommu: report x2APIC support to the operating system Bui Quang Minh
2023-11-07  0:39   ` Michael S. Tsirkin
2023-11-08 14:22     ` Bui Quang Minh
2023-11-08 19:44       ` Michael S. Tsirkin
2023-11-09 14:12         ` Bui Quang Minh [this message]
2023-11-09 10:11 ` [PATCH v9 0/5] Support x2APIC mode with TCG accelerator Santosh Shukla
2023-11-09 14:10   ` Bui Quang Minh
2023-11-09 14:32     ` Joao Martins
2023-11-09 14:42       ` Bui Quang Minh
2023-11-09 15:29         ` Santosh Shukla

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