From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: ardb@kernel.org, berrange@redhat.com, qemu-ppc@nongnu.org,
qemu-arm@nongnu.org, qemu-riscv@nongnu.org, pbonzini@redhat.com
Subject: Re: [PATCH v2 38/38] host/include/ppc: Implement aes-round.h
Date: Mon, 12 Jun 2023 10:30:13 -0300 [thread overview]
Message-ID: <299e915b-fed2-7323-3fc3-8b8921d82fe8@gmail.com> (raw)
In-Reply-To: <20230609022401.684157-39-richard.henderson@linaro.org>
On 6/8/23 23:24, Richard Henderson wrote:
> Detect CRYPTO in cpuinfo; implement the accel hooks.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> host/include/ppc/host/aes-round.h | 181 ++++++++++++++++++++++++++++
> host/include/ppc/host/cpuinfo.h | 1 +
> host/include/ppc64/host/aes-round.h | 1 +
> util/cpuinfo-ppc.c | 8 ++
> 4 files changed, 191 insertions(+)
> create mode 100644 host/include/ppc/host/aes-round.h
> create mode 100644 host/include/ppc64/host/aes-round.h
>
> diff --git a/host/include/ppc/host/aes-round.h b/host/include/ppc/host/aes-round.h
> new file mode 100644
> index 0000000000..9b5a15d1e5
> --- /dev/null
> +++ b/host/include/ppc/host/aes-round.h
> @@ -0,0 +1,181 @@
> +/*
> + * Power v2.07 specific aes acceleration.
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef PPC_HOST_AES_ROUND_H
> +#define PPC_HOST_AES_ROUND_H
> +
> +#ifndef __ALTIVEC__
> +/* Without ALTIVEC, we can't even write inline assembly. */
> +#include "host/include/generic/host/aes-round.h"
> +#else
> +#include "host/cpuinfo.h"
> +
> +#ifdef __CRYPTO__
> +# define HAVE_AES_ACCEL true
> +#else
> +# define HAVE_AES_ACCEL likely(cpuinfo & CPUINFO_CRYPTO)
> +#endif
> +#define ATTR_AES_ACCEL
> +
> +/*
> + * While there is <altivec.h>, both gcc and clang "aid" with the
> + * endianness issues in different ways. Just use inline asm instead.
> + */
> +
> +/* Bytes in memory are host-endian; bytes in register are @be. */
> +static inline AESStateVec aes_accel_ld(const AESState *p, bool be)
> +{
> + AESStateVec r;
> +
> + if (be) {
> + asm("lvx %0, 0, %1" : "=v"(r) : "r"(p), "m"(*p));
> + } else if (HOST_BIG_ENDIAN) {
> + AESStateVec rev = {
> + 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
> + };
> + asm("lvx %0, 0, %1\n\t"
> + "vperm %0, %0, %0, %2"
> + : "=v"(r) : "r"(p), "v"(rev), "m"(*p));
> + } else {
> +#ifdef __POWER9_VECTOR__
> + asm("lxvb16x %x0, 0, %1" : "=v"(r) : "r"(p), "m"(*p));
> +#else
> + asm("lxvd2x %x0, 0, %1\n\t"
> + "xxpermdi %x0, %x0, %x0, 2"
> + : "=v"(r) : "r"(p), "m"(*p));
> +#endif
> + }
> + return r;
> +}
> +
> +static void aes_accel_st(AESState *p, AESStateVec r, bool be)
> +{
> + if (be) {
> + asm("stvx %1, 0, %2" : "=m"(*p) : "v"(r), "r"(p));
> + } else if (HOST_BIG_ENDIAN) {
> + AESStateVec rev = {
> + 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
> + };
> + asm("vperm %1, %1, %1, %2\n\t"
> + "stvx %1, 0, %3"
> + : "=m"(*p), "+v"(r) : "v"(rev), "r"(p));
> + } else {
> +#ifdef __POWER9_VECTOR__
> + asm("stxvb16x %x1, 0, %2" : "=m"(*p) : "v"(r), "r"(p));
> +#else
> + asm("xxpermdi %x1, %x1, %x1, 2\n\t"
> + "stxvd2x %x1, 0, %2"
> + : "=m"(*p), "+v"(r) : "r"(p));
> +#endif
> + }
> +}
> +
> +static inline AESStateVec aes_accel_vcipher(AESStateVec d, AESStateVec k)
> +{
> + asm("vcipher %0, %0, %1" : "+v"(d) : "v"(k));
> + return d;
> +}
> +
> +static inline AESStateVec aes_accel_vncipher(AESStateVec d, AESStateVec k)
> +{
> + asm("vncipher %0, %0, %1" : "+v"(d) : "v"(k));
> + return d;
> +}
> +
> +static inline AESStateVec aes_accel_vcipherlast(AESStateVec d, AESStateVec k)
> +{
> + asm("vcipherlast %0, %0, %1" : "+v"(d) : "v"(k));
> + return d;
> +}
> +
> +static inline AESStateVec aes_accel_vncipherlast(AESStateVec d, AESStateVec k)
> +{
> + asm("vncipherlast %0, %0, %1" : "+v"(d) : "v"(k));
> + return d;
> +}
> +
> +static inline void
> +aesenc_MC_accel(AESState *ret, const AESState *st, bool be)
> +{
> + AESStateVec t, z = { };
> +
> + t = aes_accel_ld(st, be);
> + t = aes_accel_vncipherlast(t, z);
> + t = aes_accel_vcipher(t, z);
> + aes_accel_st(ret, t, be);
> +}
> +
> +static inline void
> +aesenc_SB_SR_AK_accel(AESState *ret, const AESState *st,
> + const AESState *rk, bool be)
> +{
> + AESStateVec t, k;
> +
> + t = aes_accel_ld(st, be);
> + k = aes_accel_ld(rk, be);
> + t = aes_accel_vcipherlast(t, k);
> + aes_accel_st(ret, t, be);
> +}
> +
> +static inline void
> +aesenc_SB_SR_MC_AK_accel(AESState *ret, const AESState *st,
> + const AESState *rk, bool be)
> +{
> + AESStateVec t, k;
> +
> + t = aes_accel_ld(st, be);
> + k = aes_accel_ld(rk, be);
> + t = aes_accel_vcipher(t, k);
> + aes_accel_st(ret, t, be);
> +}
> +
> +static inline void
> +aesdec_IMC_accel(AESState *ret, const AESState *st, bool be)
> +{
> + AESStateVec t, z = { };
> +
> + t = aes_accel_ld(st, be);
> + t = aes_accel_vcipherlast(t, z);
> + t = aes_accel_vncipher(t, z);
> + aes_accel_st(ret, t, be);
> +}
> +
> +static inline void
> +aesdec_ISB_ISR_AK_accel(AESState *ret, const AESState *st,
> + const AESState *rk, bool be)
> +{
> + AESStateVec t, k;
> +
> + t = aes_accel_ld(st, be);
> + k = aes_accel_ld(rk, be);
> + t = aes_accel_vncipherlast(t, k);
> + aes_accel_st(ret, t, be);
> +}
> +
> +static inline void
> +aesdec_ISB_ISR_AK_IMC_accel(AESState *ret, const AESState *st,
> + const AESState *rk, bool be)
> +{
> + AESStateVec t, k;
> +
> + t = aes_accel_ld(st, be);
> + k = aes_accel_ld(rk, be);
> + t = aes_accel_vncipher(t, k);
> + aes_accel_st(ret, t, be);
> +}
> +
> +static inline void
> +aesdec_ISB_ISR_IMC_AK_accel(AESState *ret, const AESState *st,
> + const AESState *rk, bool be)
> +{
> + AESStateVec t, k, z = { };
> +
> + t = aes_accel_ld(st, be);
> + k = aes_accel_ld(rk, be);
> + t = aes_accel_vncipher(t, z);
> + aes_accel_st(ret, t ^ k, be);
> +}
> +#endif /* __ALTIVEC__ */
> +#endif /* PPC_HOST_AES_ROUND_H */
> diff --git a/host/include/ppc/host/cpuinfo.h b/host/include/ppc/host/cpuinfo.h
> index 7ec252ef52..6cc727dba7 100644
> --- a/host/include/ppc/host/cpuinfo.h
> +++ b/host/include/ppc/host/cpuinfo.h
> @@ -16,6 +16,7 @@
> #define CPUINFO_ISEL (1u << 5)
> #define CPUINFO_ALTIVEC (1u << 6)
> #define CPUINFO_VSX (1u << 7)
> +#define CPUINFO_CRYPTO (1u << 8)
>
> /* Initialized with a constructor. */
> extern unsigned cpuinfo;
> diff --git a/host/include/ppc64/host/aes-round.h b/host/include/ppc64/host/aes-round.h
> new file mode 100644
> index 0000000000..4a78d94de8
> --- /dev/null
> +++ b/host/include/ppc64/host/aes-round.h
> @@ -0,0 +1 @@
> +#include "host/include/ppc/host/aes-round.h"
> diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c
> index ee761de33a..053b383720 100644
> --- a/util/cpuinfo-ppc.c
> +++ b/util/cpuinfo-ppc.c
> @@ -49,6 +49,14 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
> /* We only care about the portion of VSX that overlaps Altivec. */
> if (hwcap & PPC_FEATURE_HAS_VSX) {
> info |= CPUINFO_VSX;
> + /*
> + * We use VSX especially for little-endian, but we should
> + * always have both anyway, since VSX came with Power7
> + * and crypto came with Power8.
> + */
> + if (hwcap2 & PPC_FEATURE2_HAS_VEC_CRYPTO) {
> + info |= CPUINFO_CRYPTO;
> + }
> }
> }
>
prev parent reply other threads:[~2023-06-12 13:30 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-09 2:23 [PATCH v2 00/38] crypto: Provide aes-round.h and host accel Richard Henderson
2023-06-09 2:23 ` [PATCH v2 01/38] tcg/ppc: Define _CALL_AIX for clang on ppc64(be) Richard Henderson
2023-06-12 13:25 ` Daniel Henrique Barboza
2023-06-09 2:23 ` [PATCH v2 02/38] util: Add cpuinfo-ppc.c Richard Henderson
2023-06-12 13:27 ` Daniel Henrique Barboza
2023-06-19 10:37 ` Philippe Mathieu-Daudé
2023-06-19 14:44 ` Richard Henderson
2023-06-09 2:23 ` [PATCH v2 03/38] tests/multiarch: Add test-aes Richard Henderson
2023-06-12 14:46 ` Alex Bennée
2023-06-14 3:40 ` Richard Henderson
2023-06-09 2:23 ` [PATCH v2 04/38] target/arm: Move aesmc and aesimc tables to crypto/aes.c Richard Henderson
2023-06-19 16:49 ` Daniel P. Berrangé
2023-06-09 2:23 ` [PATCH v2 05/38] crypto/aes: Add constants for ShiftRows, InvShiftRows Richard Henderson
2023-06-19 15:41 ` Daniel P. Berrangé
2023-06-29 10:21 ` Ard Biesheuvel
2023-06-29 11:58 ` Richard Henderson
2023-06-09 2:23 ` [PATCH v2 06/38] crypto: Add aesenc_SB_SR_AK Richard Henderson
2023-06-19 16:56 ` Daniel P. Berrangé
2023-06-19 17:05 ` Richard Henderson
2023-06-09 2:23 ` [PATCH v2 07/38] target/i386: Use aesenc_SB_SR_AK Richard Henderson
2023-06-19 10:43 ` Philippe Mathieu-Daudé
2023-06-19 10:45 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 08/38] target/arm: Demultiplex AESE and AESMC Richard Henderson
2023-06-09 2:23 ` [PATCH v2 09/38] target/arm: Use aesenc_SB_SR_AK Richard Henderson
2023-06-09 2:23 ` [PATCH v2 10/38] target/ppc: " Richard Henderson
2023-06-12 13:26 ` Daniel Henrique Barboza
2023-06-19 10:47 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 11/38] target/riscv: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 12/38] crypto: Add aesdec_ISB_ISR_AK Richard Henderson
2023-06-09 2:23 ` [PATCH v2 13/38] target/i386: Use aesdec_ISB_ISR_AK Richard Henderson
2023-06-19 10:51 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 14/38] target/arm: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 15/38] target/ppc: " Richard Henderson
2023-06-12 13:27 ` Daniel Henrique Barboza
2023-06-19 10:51 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 16/38] target/riscv: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 17/38] crypto: Add aesenc_MC Richard Henderson
2023-06-09 2:23 ` [PATCH v2 18/38] target/arm: Use aesenc_MC Richard Henderson
2023-06-09 2:23 ` [PATCH v2 19/38] crypto: Add aesdec_IMC Richard Henderson
2023-06-09 2:23 ` [PATCH v2 20/38] target/i386: Use aesdec_IMC Richard Henderson
2023-06-09 2:23 ` [PATCH v2 21/38] target/arm: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 22/38] target/riscv: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 23/38] crypto: Add aesenc_SB_SR_MC_AK Richard Henderson
2023-06-09 2:23 ` [PATCH v2 24/38] target/i386: Use aesenc_SB_SR_MC_AK Richard Henderson
2023-06-09 2:23 ` [PATCH v2 25/38] target/ppc: " Richard Henderson
2023-06-12 13:28 ` Daniel Henrique Barboza
2023-06-09 2:23 ` [PATCH v2 26/38] target/riscv: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 27/38] crypto: Add aesdec_ISB_ISR_IMC_AK Richard Henderson
2023-06-09 2:23 ` [PATCH v2 28/38] target/i386: Use aesdec_ISB_ISR_IMC_AK Richard Henderson
2023-06-09 2:23 ` [PATCH v2 29/38] target/riscv: " Richard Henderson
2023-06-09 2:23 ` [PATCH v2 30/38] crypto: Add aesdec_ISB_ISR_AK_IMC Richard Henderson
2023-06-19 13:59 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 31/38] target/ppc: Use aesdec_ISB_ISR_AK_IMC Richard Henderson
2023-06-12 13:28 ` Daniel Henrique Barboza
2023-06-19 13:46 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 32/38] crypto: Remove AES_shifts, AES_ishifts Richard Henderson
2023-06-19 13:45 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 33/38] crypto: Implement aesdec_IMC with AES_imc_rot Richard Henderson
2023-06-20 5:09 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 34/38] crypto: Remove AES_imc Richard Henderson
2023-06-19 13:19 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 35/38] crypto: Unexport AES_*_rot, AES_TeN, AES_TdN Richard Henderson
2023-06-19 13:18 ` Philippe Mathieu-Daudé
2023-06-09 2:23 ` [PATCH v2 36/38] host/include/i386: Implement aes-round.h Richard Henderson
2023-06-09 2:24 ` [PATCH v2 37/38] host/include/aarch64: " Richard Henderson
2023-06-09 2:24 ` [PATCH v2 38/38] host/include/ppc: " Richard Henderson
2023-06-12 13:30 ` Daniel Henrique Barboza [this message]
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