From: Richard Henderson <richard.henderson@linaro.org>
To: Xiaojuan Yang <yangxiaojuan@loongson.cn>, qemu-devel@nongnu.org
Cc: gaosong@loongson.cn, maobibo@loongson.cn,
mark.cave-ayland@ilande.co.uk, mst@redhat.com,
imammedo@redhat.com, ani@anisinha.ca, f4bug@amsat.org,
peter.maydell@linaro.org
Subject: Re: [PATCH v3 2/5] hw/intc/loongarch_pch_pic: Fix bugs for update_irq function
Date: Tue, 19 Jul 2022 11:04:39 +0530 [thread overview]
Message-ID: <29e3c671-20db-11cc-508f-ef1fdaaf12bd@linaro.org> (raw)
In-Reply-To: <20220715060740.1500628-3-yangxiaojuan@loongson.cn>
On 7/15/22 11:37, Xiaojuan Yang wrote:
> Fix such errors:
> 1. We should not use 'unsigned long' type as argument when we use
> find_first_bit(), and we use ctz64() to replace find_first_bit()
> to fix this bug.
> 2. It is not standard to use '1ULL << irq' to generate a irq mask.
> So, we replace it with 'MAKE_64BIT_MASK(irq, 1)'.
>
> Fix coverity CID: 1489761 1489764 1489765
>
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> ---
> hw/intc/loongarch_pch_pic.c | 18 +++++++++++-------
> 1 file changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
> index 3c9814a3b4..8fa64d2030 100644
> --- a/hw/intc/loongarch_pch_pic.c
> +++ b/hw/intc/loongarch_pch_pic.c
> @@ -15,22 +15,26 @@
>
> static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
> {
> - unsigned long val;
> + uint64_t val;
> int irq;
>
> if (level) {
> val = mask & s->intirr & ~s->int_mask;
> if (val) {
> - irq = find_first_bit(&val, 64);
> - s->intisr |= 0x1ULL << irq;
> - qemu_set_irq(s->parent_irq[s->htmsi_vector[irq]], 1);
> + irq = ctz64(val);
> + if (irq < 64) {
This test is always true, provable by the val != 0 test just above.
r~
> + s->intisr |= MAKE_64BIT_MASK(irq, 1);
> + qemu_set_irq(s->parent_irq[s->htmsi_vector[irq]], 1);
> + }
> }
> } else {
> val = mask & s->intisr;
> if (val) {
> - irq = find_first_bit(&val, 64);
> - s->intisr &= ~(0x1ULL << irq);
> - qemu_set_irq(s->parent_irq[s->htmsi_vector[irq]], 0);
> + irq = ctz64(val);
> + if (irq < 64) {
> + s->intisr &= ~(MAKE_64BIT_MASK(irq, 1));
> + qemu_set_irq(s->parent_irq[s->htmsi_vector[irq]], 0);
> + }
> }
> }
> }
next prev parent reply other threads:[~2022-07-19 5:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 6:07 [PATCH v3 0/5] Fix LoongArch coverity error and cpu name bug Xiaojuan Yang
2022-07-15 6:07 ` [PATCH v3 1/5] target/loongarch/cpu: Fix cpu_class_by_name function Xiaojuan Yang
2022-07-19 6:46 ` Richard Henderson
2022-07-19 6:52 ` Richard Henderson
2022-07-19 8:38 ` Igor Mammedov
2022-07-15 6:07 ` [PATCH v3 2/5] hw/intc/loongarch_pch_pic: Fix bugs for update_irq function Xiaojuan Yang
2022-07-19 5:34 ` Richard Henderson [this message]
2022-07-15 6:07 ` [PATCH v3 3/5] target/loongarch/cpu: Fix coverity errors about excp_names Xiaojuan Yang
2022-07-15 6:07 ` [PATCH v3 4/5] target/loongarch/tlb_helper: Fix coverity integer overflow error Xiaojuan Yang
2022-07-15 6:07 ` [PATCH v3 5/5] target/loongarch/op_helper: Fix coverity cond_at_most error Xiaojuan Yang
2022-07-19 6:58 ` [PATCH v3 0/5] Fix LoongArch coverity error and cpu name bug Richard Henderson
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