Re: [PATCH] i386/tcg: generate an illegal op when translating AVX instructions

[Richard Henderson <richard.henderson@linaro.org>]

On 1/6/22 2:35 AM, Stevie Lavern wrote:
> The AVX instruction set is not supported by Qemu.
> However, some AVX instructions are properly decoded and emulated as their
> legacy SSE version.
> This patch prevent this by generating an illegal_op instead of a bogus SSE
> instruction.
> 
> Signed-off-by: Stevie Lavern <stevie.lavern@gmail.com <mailto:stevie.lavern@gmail.com>>
> ---
>   target/i386/tcg/translate.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
> index 05f9336c9b..996fce65b2 100644
> --- a/target/i386/tcg/translate.c
> +++ b/target/i386/tcg/translate.c
> @@ -4706,6 +4706,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>           }
>       }
> 
> +    if (s->vex_l & 1) {

The whole value should be 0, not only bit 0.

> +        /* If set, registers are 256bits.
> +           Fail as AVX extension is not supported. */

checkpatch.pl should have complained about the comment formatting:

     /*
      * multi line
      * comment
      */

Otherwise it looks good.


r~