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From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org,
	"Mark Cave-Ayland" <mark.caveayland@nutanix.com>,
	"Anton Johansson" <anjo@rev.ng>
Subject: Re: [RFC PATCH v5 08/21] hw/arm: Add DEFINE_MACHINE_[ARM_]AARCH64() macros
Date: Fri, 25 Apr 2025 13:05:54 -0700	[thread overview]
Message-ID: <29f67d66-9eef-493a-9d96-99240ca25a14@linaro.org> (raw)
In-Reply-To: <f84a52af-aecf-5235-7971-689580ffb71f@eik.bme.hu>

On 4/25/25 02:43, BALATON Zoltan wrote:
> On Thu, 24 Apr 2025, Pierrick Bouvier wrote:
>> On 4/24/25 17:16, BALATON Zoltan wrote:
>>> On Fri, 25 Apr 2025, Philippe Mathieu-Daudé wrote:
>>>> A machine defined with the DEFINE_MACHINE_ARM_AARCH64() macro
>>>> will be available on qemu-system-arm and qemu-system-aarch64
>>>> binaries.
>>>>
>>>> One defined with DEFINE_MACHINE_AARCH64() will only be available
>>>> in the qemu-system-aarch64 binary.
>>>>
>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>> ---
>>>> include/hw/arm/machines-qom.h | 13 +++++++++++++
>>>> target/arm/machine.c          | 12 ++++++++++++
>>>> 2 files changed, 25 insertions(+)
>>>>
>>>> diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
>>>> index a17225f5f92..6277ee986d9 100644
>>>> --- a/include/hw/arm/machines-qom.h
>>>> +++ b/include/hw/arm/machines-qom.h
>>>> @@ -9,10 +9,23 @@
>>>> #ifndef HW_ARM_MACHINES_QOM_H
>>>> #define HW_ARM_MACHINES_QOM_H
>>>>
>>>> +#include "hw/boards.h"
>>>> +
>>>> #define TYPE_TARGET_ARM_MACHINE \
>>>>           "target-info-arm-machine"
>>>>
>>>> #define TYPE_TARGET_AARCH64_MACHINE \
>>>>           "target-info-aarch64-machine"
>>>>
>>>> +extern InterfaceInfo arm_aarch64_machine_interfaces[];
>>>> +extern InterfaceInfo aarch64_machine_interfaces[];
>>>> +
>>>> +#define DEFINE_MACHINE_ARM_AARCH64(namestr, machine_initfn) \
>>>> +        DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, \
>>>> +                                       arm_aarch64_machine_interfaces)
>>>> +
>>>> +#define DEFINE_MACHINE_AARCH64(namestr, machine_initfn) \
>>>> +        DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, \
>>>> +                                       aarch64_machine_interfaces)
>>>> +
>>>> #endif
>>>> diff --git a/target/arm/machine.c b/target/arm/machine.c
>>>> index 978249fb71b..193c7a9cff0 100644
>>>> --- a/target/arm/machine.c
>>>> +++ b/target/arm/machine.c
>>>> @@ -8,6 +8,7 @@
>>>> #include "cpu-features.h"
>>>> #include "migration/cpu.h"
>>>> #include "target/arm/gtimer.h"
>>>> +#include "hw/arm/machines-qom.h"
>>>>
>>>> static bool vfp_needed(void *opaque)
>>>> {
>>>> @@ -1111,3 +1112,14 @@ const VMStateDescription vmstate_arm_cpu = {
>>>>           NULL
>>>>       }
>>>> };
>>>> +
>>>> +InterfaceInfo arm_aarch64_machine_interfaces[] = {
>>>> +    { TYPE_TARGET_ARM_MACHINE },
>>>> +    { TYPE_TARGET_AARCH64_MACHINE },
>>>> +    { }
>>>> +};
>>>> +
>>>> +InterfaceInfo aarch64_machine_interfaces[] = {
>>>> +    { TYPE_TARGET_AARCH64_MACHINE },
>>>> +    { }
>>>> +};
>>>
>>> Why do you need these? If you define DEFINE_MACHINE_WITH_INTERFACES as
>>> OBJECT_DEFINE_TYPE_WITH_INTERFACES then you can write:
>>>
>>
>> This was requested in v4 by Richard to remove anonymous array duplication in
>> .data.
>>
>>> DEFINE_MACHINE_WITH_INTERFACES(name, initfn, { TYPE_TARGET_ARM_MACHINE },
>>>        { TYPE_TARGET_AARCH64_MACHINE }, { })
>>>
>>> and no more macros needed. Ideally those places that are now blown up
>>> should use DEFINE_MACHINE too. Maybe they don't yet because the parent
>>> type  is hardcoded so we should really have
>>>
>>
>> Not sure what you mean by "no more macros needed".
> 
> No other specialised macros needed for each machine type other than
> DEFINE_MACHINE_WITH_INTERFACES or DEFINE_MACHINE_EXTENDED. So I suggested
> to keep DEFINE_MACHINE by making it more general so it can cover the new
> uses instead of bringing back the boiler plate and losing the clarity
> hinding these behind the macros.
> 

This is exactly what we have in this series.
Patch 7 introduces DEFINE_MACHINE_WITH_INTERFACES.
I guess Philippe chose a new name to avoid modifying all existing 
DEFINE_MACHINE, and I think it's understandable, as we want those 
changes to impact hw/arm only first. That said, it would be very easy to 
refactor/modify later, so it's not a big deal.

This patch introduces DEFINE_MACHINE_ARM_AARCH64 and DEFINE_MACHINE_AARCH64.

Is the problem with those specialized DEFINE_MACHINE_{ARM, AARCH64} 
definition?
If yes, and if you prefer an explicit 
DEFINE_MACHINE_WITH_INTERFACES(..., arm_aarch64_machine_interfaces), I'm 
sure Philippe would be open to make such a change to satisfy reviews.

Let's just try to decide something, and move on.

>> arm_aarch64_machine_interfaces or aarch64_machine_interfaces are arrays
>> (defined only once), which are passed as a parameter to
>> DEFINE_MACHINE_WITH_INTERFACES, or manually set with ".interfaces =".
> 
> Look at how OBJECT_DEFINE_TYPE_WITH_INTERFACES is defined.
>

This macro is not used for any machine definition so far, and 
DEFINE_MACHINE is the "standard" macro used, at least the one most 
commonly used in the codebase. So it makes sense to simply expand the 
latter.

>>> DEFINE_MACHINE_EXTENDED(name, parent, initfn, interfaces...)
>>>
>>> and remove more bolier plate that way?
>>>
>>
>> Could you can share a concrete example of what you expect, with the new
>> macros to add, and how to use them for a given board?
> 
> I tried to do that in this message you replied to.
>

If you refer to "DEFINE_MACHINE_EXTENDED(name, parent, initfn, 
interfaces...)", this is almost exactly what patch 7 is introducing with
DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, ifaces).

> Regards,
> BALATON Zoltan


  reply	other threads:[~2025-04-25 20:06 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-24 22:20 [RFC PATCH v5 00/21] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 01/21] qapi: Rename TargetInfo structure as QemuTargetInfo Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 02/21] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 03/21] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 04/21] hw/core/null-machine: Define machine as generic QOM type Philippe Mathieu-Daudé
2025-04-24 22:30   ` Pierrick Bouvier
2025-04-24 22:47     ` Philippe Mathieu-Daudé
2025-04-24 22:49       ` Pierrick Bouvier
2025-04-24 22:20 ` [RFC PATCH v5 05/21] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 06/21] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 07/21] hw/boards: Introduce DEFINE_MACHINE_WITH_INTERFACES() macro Philippe Mathieu-Daudé
2025-04-24 22:44   ` Pierrick Bouvier
2025-04-24 22:20 ` [RFC PATCH v5 08/21] hw/arm: Add DEFINE_MACHINE_[ARM_]AARCH64() macros Philippe Mathieu-Daudé
2025-04-24 22:35   ` Pierrick Bouvier
2025-04-24 22:45     ` Philippe Mathieu-Daudé
2025-04-25  0:16   ` BALATON Zoltan
2025-04-25  6:05     ` Pierrick Bouvier
2025-04-25  9:43       ` BALATON Zoltan
2025-04-25 20:05         ` Pierrick Bouvier [this message]
2025-04-25 20:29           ` BALATON Zoltan
2025-04-25 20:36             ` Pierrick Bouvier
2025-04-28  6:52               ` Philippe Mathieu-Daudé
2025-04-28 10:31                 ` BALATON Zoltan
2025-04-28 16:47                   ` Pierrick Bouvier
2025-04-28 18:44                     ` BALATON Zoltan
2025-04-28 19:09                       ` Pierrick Bouvier
2025-04-29  1:10                         ` BALATON Zoltan
2025-04-29  1:21                           ` Pierrick Bouvier
2025-05-01 23:35                             ` BALATON Zoltan
2025-05-03 19:38                               ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 09/21] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 10/21] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 11/21] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 12/21] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 13/21] hw/arm/raspi: " Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 14/21] hw/core/machine: Allow dynamic registration of valid CPU types Philippe Mathieu-Daudé
2025-04-24 22:43   ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 15/21] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé
2025-04-24 22:38   ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 16/21] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé
2025-04-24 22:39   ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 17/21] qemu/target_info: Add %target_arch field to TargetInfo Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 18/21] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 19/21] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 20/21] hw/core: Introduce MachineClass::get_default_cpu_type() helper Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 21/21] hw/arm/virt: Get default CPU type at runtime Philippe Mathieu-Daudé
2025-04-28  3:19   ` Zhang Chen

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