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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liweiwei@iscas.ac.cn,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	ajones@ventanamicro.com
Subject: Re: [PATCH v5 01/19] target/riscv: skip features setup for KVM CPUs
Date: Tue, 27 Jun 2023 23:19:44 +0200	[thread overview]
Message-ID: <29ffa6db-a4ed-0e67-2995-951248e8302e@linaro.org> (raw)
In-Reply-To: <20230627163203.49422-2-dbarboza@ventanamicro.com>

Hi Daniel,

On 27/6/23 18:31, Daniel Henrique Barboza wrote:
> As it is today it's not possible to use '-cpu host' if the RISC-V host
> has RVH enabled. This is the resulting error:
> 
> $ sudo ./qemu/build/qemu-system-riscv64 \
>      -machine virt,accel=kvm -m 2G -smp 1 \
>      -nographic -snapshot -kernel ./guest_imgs/Image  \
>      -initrd ./guest_imgs/rootfs_kvm_riscv64.img \
>      -append "earlycon=sbi root=/dev/ram rw" \
>      -cpu host
> qemu-system-riscv64: H extension requires priv spec 1.12.0
> 
> This happens because we're checking for priv spec for all CPUs, and
> since we're not setting  env->priv_ver for the 'host' CPU, it's being
> default to zero (i.e. PRIV_SPEC_1_10_0).
> 
> In reality env->priv_ver does not make sense when running with the KVM
> 'host' CPU. It's used to gate certain CSRs/extensions during translation
> to make them unavailable if the hart declares an older spec version. It
> doesn't have any other use. E.g. OpenSBI version 1.2 retrieves the spec
> checking if the CSR_MCOUNTEREN, CSR_MCOUNTINHIBIT and CSR_MENVCFG CSRs
> are available [1].
> 
> 'priv_ver' is just one example. We're doing a lot of feature validation
> and setup during riscv_cpu_realize() that it doesn't apply KVM CPUs.
> Validating the feature set for those CPUs is a KVM problem that should
> be handled in KVM specific code.
> 
> The new riscv_cpu_realize_features() helper contains all validation
> logic that are not applicable to KVM CPUs. riscv_cpu_realize() verifies
> if we're dealing with a KVM CPU and, if not, execute the new helper to
> proceed with the usual realize() logic for all other CPUs.
> 
> [1] lib/sbi/sbi_hart.c, hart_detect_features()
> 
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>   target/riscv/cpu.c | 43 +++++++++++++++++++++++++++++++++----------
>   1 file changed, 33 insertions(+), 10 deletions(-)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index fb8458bf74..e515dde208 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -331,6 +331,15 @@ static void set_satp_mode_default_map(RISCVCPU *cpu)
>   }
>   #endif
>   
> +static bool riscv_running_kvm(void)
> +{
> +#ifndef CONFIG_USER_ONLY
> +    return kvm_enabled();
> +#else
> +    return false;
> +#endif
> +}

Instead of this, ...

> @@ -1369,6 +1370,28 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
>           }
>        }
>   #endif
> +}
> +
> +static void riscv_cpu_realize(DeviceState *dev, Error **errp)
> +{
> +    CPUState *cs = CPU(dev);
> +    RISCVCPU *cpu = RISCV_CPU(dev);
> +    RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev);
> +    Error *local_err = NULL;
> +
> +    cpu_exec_realizefn(cs, &local_err);
> +    if (local_err != NULL) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +
> +    if (!riscv_running_kvm()) {

... why not simply do:

    #ifndef CONFIG_USER_ONLY

        if (!kvm_enabled()) {

> +        riscv_cpu_realize_features(dev, &local_err);
> +        if (local_err != NULL) {
> +            error_propagate(errp, local_err);
> +            return;
> +        }
> +    }

    #endif

?

If riscv_cpu_realize_features() is for all but KVM, then the
name isn't ideal.


  reply	other threads:[~2023-06-27 21:21 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-27 16:31 [PATCH v5 00/19] target/riscv, KVM: fixes and enhancements Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 01/19] target/riscv: skip features setup for KVM CPUs Daniel Henrique Barboza
2023-06-27 21:19   ` Philippe Mathieu-Daudé [this message]
2023-06-27 23:24     ` Daniel Henrique Barboza
2023-06-28  6:39       ` Philippe Mathieu-Daudé
2023-06-27 16:31 ` [PATCH v5 02/19] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set Daniel Henrique Barboza
2023-06-27 21:20   ` Philippe Mathieu-Daudé
2023-06-27 16:31 ` [PATCH v5 03/19] target/riscv/cpu.c: restrict 'mvendorid' value Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 04/19] target/riscv/cpu.c: restrict 'mimpid' value Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 05/19] target/riscv/cpu.c: restrict 'marchid' value Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 06/19] target/riscv: use KVM scratch CPUs to init KVM properties Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 07/19] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids() Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 08/19] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 09/19] linux-headers: Update to v6.4-rc1 Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 10/19] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 11/19] target/riscv/cpu: add misa_ext_info_arr[] Daniel Henrique Barboza
2023-06-27 21:29   ` Philippe Mathieu-Daudé
2023-06-28  0:04     ` Daniel Henrique Barboza
2023-06-28  6:35       ` Philippe Mathieu-Daudé
2023-06-28  8:10     ` Andrew Jones
2023-06-27 16:31 ` [PATCH v5 12/19] target/riscv: add KVM specific MISA properties Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 13/19] target/riscv/kvm.c: update KVM MISA bits Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 14/19] target/riscv/kvm.c: add multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 15/19] target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext() Daniel Henrique Barboza
2023-06-27 16:32 ` [PATCH v5 16/19] target/riscv/cpu.c: create KVM mock properties Daniel Henrique Barboza
2023-06-28  8:14   ` Andrew Jones
2023-06-27 16:32 ` [PATCH v5 17/19] target/riscv: update multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-27 16:32 ` [PATCH v5 18/19] target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper Daniel Henrique Barboza
2023-06-27 16:32 ` [PATCH v5 19/19] target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM Daniel Henrique Barboza

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