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Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Subject: Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R Content-Language: en-US To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Leandro Lupori , qemu-devel@nongnu.org, qemu-ppc@nongnu.org References: <20211124120046.6831-1-leandro.lupori@eldorado.org.br> <00546896-2466-007f-b73c-fe4f889fac2f@gmail.com> <1dae4d80-6b0b-5542-b783-7a3bb434bc16@kaod.org> From: Daniel Henrique Barboza In-Reply-To: <1dae4d80-6b0b-5542-b783-7a3bb434bc16@kaod.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::92a (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::92a; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x92a.google.com X-Spam_score_int: -51 X-Spam_score: -5.2 X-Spam_bar: ----- X-Spam_report: (-5.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-4.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: groug@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/24/21 15:42, Cédric Le Goater wrote: > On 11/24/21 14:40, Daniel Henrique Barboza wrote: >> >> >> On 11/24/21 09:00, Leandro Lupori wrote: >>> When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte >>> offset, causing the first byte of the adjacent PTE to be corrupted. >>> This caused a panic when booting FreeBSD, using the Hash MMU. > > I wonder how we never hit this issue before. Are you testing PowerNV > and/or pSeries  ? > > Could you share a FreeBDS image with us ? > >> If you add a "Fixes:" tag with the commit that introduced the code you're >> fixing, we can push it right away as a bug fix in 6.2 (assuming it doesn't >> break anything else, of course). >> >> The commit to be fixed in the case seems to be a2dd4e83e76b ("ppc/hash64: >> Rework R and C bit updates") > > Indeed. > >> One more comment below: >> >>> >>> Signed-off-by: Leandro Lupori >>> --- >>>   target/ppc/mmu-hash64.c | 2 +- >>>   1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c >>> index 19832c4b46..f165ac691a 100644 >>> --- a/target/ppc/mmu-hash64.c >>> +++ b/target/ppc/mmu-hash64.c >>> @@ -786,7 +786,7 @@ static void ppc_hash64_set_dsi(CPUState *cs, int mmu_idx, uint64_t dar, uint64_t >>>   static void ppc_hash64_set_r(PowerPCCPU *cpu, hwaddr ptex, uint64_t pte1) >>>   { >>> -    hwaddr base, offset = ptex * HASH_PTE_SIZE_64 + 16; >>> +    hwaddr base, offset = ptex * HASH_PTE_SIZE_64 + 14; >> >> Instead of adding a '14' you should add a new #define in mmu-hash64.h with this >> value, something like "HPTE64_R_R_SHIFT". This will avoid hardcoding literals >> around the code and forcing us to go to the ISA every time we wonder what's >> an apparently random number represents. There's also a "HPTE64_R_R" defined >> there but I'm not sure if it's usable here, so feel free to create a new >> macro if needed. >> >> In that note, the original commit that added this code also added a lot of >> hardcoded "15" values for the C bit update in spapr_hpte_set_c() and >> ppc_hash64_set_c(), and a "14" value like you're changing here in spapr_hpte_set_r(). >> If you're feeling generous I believe that another patch replacing these hardcoded values >> with bit shift macros is warranted as well. > > May be for 7.0 though ? Yeah, this extra cleanup I proposed can be postponed to 7.0 in case someone wants to give it a go. Daniel > > Thanks, > > C. >