[Qemu-devel] [PATCH] Implement PC port80 debug register.

[Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jordan Justen]

From: jljusten <jljusten@jljusten-laptop.(none)>

In PC systems, the byte I/O port 0x80 is commonly made into a
read/write byte.  BIOS and/or system software will often use
it as a simple checkpoint marker.

Signed-off-by: Jordan Justen <jljusten@gmail.com>
---
 Makefile.target |    2 +-
 hw/pc.c         |    6 +---
 hw/pc.h         |    7 ++++
 hw/port80.c     |   87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 96 insertions(+), 6 deletions(-)
 create mode 100644 hw/port80.c

diff --git a/Makefile.target b/Makefile.target
index a0f24fa..2173ce2 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -572,7 +572,7 @@ OBJS += wdt_ib700.o wdt_i6300esb.o
 ifeq ($(TARGET_BASE_ARCH), i386)
 # Hardware support
 OBJS+= ide.o pckbd.o vga.o $(SOUND_HW) dma.o
-OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
+OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o port80.o pc.o
 OBJS+= cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
 OBJS+= usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
 OBJS += device-hotplug.o pci-hotplug.o smbios.o
diff --git a/hw/pc.c b/hw/pc.c
index 86e5cfe..19d5017 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -84,10 +84,6 @@ static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
     qemu_register_reset(option_rom_reset, 0, rrd);
 }
 
-static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
-{
-}
-
 /* MSDOS compatibility mode FPU exception support */
 static qemu_irq ferr_irq;
 /* XXX: add IGNNE support */
@@ -1011,7 +1007,7 @@ static void pc_init1(ram_addr_t ram_size,
     }
 
     /* init basic PC hardware */
-    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
+    port80_init();
 
     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 
diff --git a/hw/pc.h b/hw/pc.h
index 9fbae20..1d0423e 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -166,4 +166,11 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
 
 int cpu_is_bsp(CPUState *env);
+
+/* port80.c */
+
+typedef struct Port80State Port80State;
+
+Port80State *port80_init(void);
+
 #endif
diff --git a/hw/port80.c b/hw/port80.c
new file mode 100644
index 0000000..7472bad
--- /dev/null
+++ b/hw/port80.c
@@ -0,0 +1,87 @@
+/*
+ * QEMU debug port 80 emulation
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ * Copyright (c) 2009 Jordan Justen
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw.h"
+#include "sysemu.h"
+#include "pc.h"
+#include "isa.h"
+
+//#define DEBUG_PORT80
+
+struct Port80State {
+    uint8_t data;
+};
+
+static void port80_ioport_write(void *opaque, uint32_t addr, uint32_t data)
+{
+    Port80State *s = opaque;
+
+#ifdef DEBUG_PORT80
+    printf("port%02x: write val=0x%02x\n", addr, data);
+#endif
+    s->data = data;
+}
+
+static uint32_t port80_ioport_read(void *opaque, uint32_t addr)
+{
+    Port80State *s = opaque;
+    int ret;
+    ret = s->data;
+#ifdef DEBUG_PORT80
+    printf("port%02x: read val=0x%02x\n", addr, ret);
+#endif
+    return ret;
+}
+
+static void port80_save(QEMUFile *f, void *opaque)
+{
+    Port80State *s = opaque;
+
+    qemu_put_byte(f, s->data);
+}
+
+static int port80_load(QEMUFile *f, void *opaque, int version_id)
+{
+    Port80State *s = opaque;
+
+    if (version_id != 1)
+        return -EINVAL;
+
+    s->data = qemu_get_byte(f);
+    return 0;
+}
+
+Port80State *port80_init()
+{
+    Port80State *s;
+
+    s = qemu_mallocz(sizeof(Port80State));
+
+    register_ioport_write(0x80, 1, 1, port80_ioport_write, s);
+    register_ioport_read(0x80, 1, 1, port80_ioport_read, s);
+
+    register_savevm("port80", 0x80, 1, port80_save, port80_load, s);
+    return s;
+}
+
-- 
1.6.0.4

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Anthony Liguori]

Jordan Justen wrote:
> From: jljusten <jljusten@jljusten-laptop.(none)>
>
> In PC systems, the byte I/O port 0x80 is commonly made into a
> read/write byte.  BIOS and/or system software will often use
> it as a simple checkpoint marker.
>   

What software does this?  Typically, port80 is used as an IO delay 
mechanism.  I'm not aware of it being used to read/write arbitrary data.

Regards,

Anthony Liguori

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Paul Brook]

On Monday 29 June 2009, Anthony Liguori wrote:
> Jordan Justen wrote:
> > From: jljusten <jljusten@jljusten-laptop.(none)>
> >
> > In PC systems, the byte I/O port 0x80 is commonly made into a
> > read/write byte.  BIOS and/or system software will often use
> > it as a simple checkpoint marker.
>
> What software does this?  Typically, port80 is used as an IO delay
> mechanism.  I'm not aware of it being used to read/write arbitrary data.

Port 0x80 is generally the bios debug port. It's not uncommon for motherboards 
to display the values written to this port via an onboard 7-segment LED.

Paul

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Avi Kivity]

On 06/29/2009 04:47 PM, Anthony Liguori wrote:
> Jordan Justen wrote:
>> From: jljusten <jljusten@jljusten-laptop.(none)>
>>
>> In PC systems, the byte I/O port 0x80 is commonly made into a
>> read/write byte.  BIOS and/or system software will often use
>> it as a simple checkpoint marker.
>
> What software does this?  Typically, port80 is used as an IO delay 
> mechanism.  I'm not aware of it being used to read/write arbitrary data.
>

It's often used in BIOS code.  There used to be seven-segment cards 
you'd plug into a computer that would show you port 80 in real time.  I 
think it's a write-only port, though.

-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Chris Lalancette]

Avi Kivity wrote:
> On 06/29/2009 04:47 PM, Anthony Liguori wrote:
>> Jordan Justen wrote:
>>> From: jljusten <jljusten@jljusten-laptop.(none)>
>>>
>>> In PC systems, the byte I/O port 0x80 is commonly made into a
>>> read/write byte.  BIOS and/or system software will often use
>>> it as a simple checkpoint marker.
>> What software does this?  Typically, port80 is used as an IO delay 
>> mechanism.  I'm not aware of it being used to read/write arbitrary data.
>>
> 
> It's often used in BIOS code.  There used to be seven-segment cards 

s/used to be/are/

http://www.biosman.com/port80.htm

(although only for ISA/PCI slots, which may be hard to find on modern motherboards)

> you'd plug into a computer that would show you port 80 in real time.  I 
> think it's a write-only port, though.

-- 
Chris Lalancette

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jordan Justen]

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Avi,

Well, I am not sure if this it globally the case for PC motherboards, but in
my experience, it has been read/write.

At least for a system such as qemu, it make it difficult to use the port80
checkpoint of software without being able to read the last value written.

-Jordan

On Mon, Jun 29, 2009 at 7:23 AM, Avi Kivity <avi@redhat.com> wrote:

> On 06/29/2009 04:47 PM, Anthony Liguori wrote:
>
>> Jordan Justen wrote:
>>
>>> From: jljusten <jljusten@jljusten-laptop.(none)>
>>>
>>> In PC systems, the byte I/O port 0x80 is commonly made into a
>>> read/write byte.  BIOS and/or system software will often use
>>> it as a simple checkpoint marker.
>>>
>>
>> What software does this?  Typically, port80 is used as an IO delay
>> mechanism.  I'm not aware of it being used to read/write arbitrary data.
>>
>>
> It's often used in BIOS code.  There used to be seven-segment cards you'd
> plug into a computer that would show you port 80 in real time.  I think it's
> a write-only port, though.
>
> --
> error compiling committee.c: too many arguments to function
>
>

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Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Anthony Liguori]

Jordan Justen wrote:
> Avi,
>
> Well, I am not sure if this it globally the case for PC motherboards, 
> but in my experience, it has been read/write.
>
> At least for a system such as qemu, it make it difficult to use the 
> port80 checkpoint of software without being able to read the last 
> value written.

It seems like the more logical thing to do is to save the port80 write 
and have it obtainable via the monitor.

But really, we have other debug mechanisms for BIOSes (like ports 
50x/40x).  That seems like a better thing to use if you're writing 
custom code for QEMU.

Regards,

Anthony Liguori

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jordan Justen]

[-- Attachment #1: Type: text/plain, Size: 1164 bytes --]

Anthony,

That seems like a reasonable request.

So, a 'info port80' command would be preferable to having i/o port 0x80 be
read/write?

I still think the read/write port route would
* better emulate systems,
* be more flexible (allowing software the option to read it),
* and, be easier to implement :)

But, I think the most important part is to make the data accessible
somehow.  So, the monitor access method would work fine as well.

-Jordan

On Mon, Jun 29, 2009 at 8:31 AM, Anthony Liguori <anthony@codemonkey.ws>wrote:

> Jordan Justen wrote:
>
>> Avi,
>>
>> Well, I am not sure if this it globally the case for PC motherboards, but
>> in my experience, it has been read/write.
>>
>> At least for a system such as qemu, it make it difficult to use the port80
>> checkpoint of software without being able to read the last value written.
>>
>
> It seems like the more logical thing to do is to save the port80 write and
> have it obtainable via the monitor.
>
> But really, we have other debug mechanisms for BIOSes (like ports 50x/40x).
>  That seems like a better thing to use if you're writing custom code for
> QEMU.
>
> Regards,
>
> Anthony Liguori
>
>

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Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Avi Kivity]

On 06/29/2009 07:07 PM, Jordan Justen wrote:
> Anthony,
>
> That seems like a reasonable request.
>
> So, a 'info port80' command would be preferable to having i/o port 
> 0x80 be read/write?
>

Maybe, info debug-port.

> I still think the read/write port route would
> * better emulate systems,
> * be more flexible (allowing software the option to read it),
> * and, be easier to implement :)
>
> But, I think the most important part is to make the data accessible 
> somehow.  So, the monitor access method would work fine as well.

I don't object to read/write access.

-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Anthony Liguori]

Avi Kivity wrote:
>> I still think the read/write port route would
>> * better emulate systems,
>> * be more flexible (allowing software the option to read it),
>> * and, be easier to implement :)
>>
>> But, I think the most important part is to make the data accessible 
>> somehow.  So, the monitor access method would work fine as well.
>
> I don't object to read/write access.

If there's read and write access, it needs to be part of the savevm 
state.  Is it per-cpu?  If it's write only, then it doesn't need to be 
persisted in savevm.

I'd lean toward write-only unless there was a compelling reason to make 
it read/write.

Regards,

Anthony Liguori

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Avi Kivity]

On 06/29/2009 09:39 PM, Anthony Liguori wrote:
> Avi Kivity wrote:
>>> I still think the read/write port route would
>>> * better emulate systems,
>>> * be more flexible (allowing software the option to read it),
>>> * and, be easier to implement :)
>>>
>>> But, I think the most important part is to make the data accessible 
>>> somehow.  So, the monitor access method would work fine as well.
>>
>> I don't object to read/write access.
>
> If there's read and write access, it needs to be part of the savevm 
> state. 

That's true even if it's write only, as long as it is observable somehow 
(in our case, from the monitor).

> Is it per-cpu?

No, it's a normal pci/isa card.

> I'd lean toward write-only unless there was a compelling reason to 
> make it read/write.

I can't say there's a compelling reason for that.

-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Alexander Graf]

On 29.06.2009, at 20:39, Anthony Liguori wrote:

> Avi Kivity wrote:
>>> I still think the read/write port route would
>>> * better emulate systems,
>>> * be more flexible (allowing software the option to read it),
>>> * and, be easier to implement :)
>>>
>>> But, I think the most important part is to make the data  
>>> accessible somehow.  So, the monitor access method would work fine  
>>> as well.
>>
>> I don't object to read/write access.
>
> If there's read and write access, it needs to be part of the savevm  
> state.  Is it per-cpu?  If it's write only, then it doesn't need to  
> be persisted in savevm.
>
> I'd lean toward write-only unless there was a compelling reason to  
> make it read/write.

Well it was write-only before, so I don't see any harm in keeping it  
that way. Or am I mistaken there?

Alex

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Avi Kivity]

On 06/29/2009 09:46 PM, Alexander Graf wrote:
>
> Well it was write-only before, so I don't see any harm in keeping it 
> that way. Or am I mistaken there?

We could compromise by making even bits write-only and odd bits read-only.

-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jordan Justen]

[-- Attachment #1: Type: text/plain, Size: 1172 bytes --]

Alex,

Well it was write-only before, so I don't see any harm in keeping it that
> way. Or am I mistaken there?
>

As I noted, I have seen it be read/write on real systems.  But, for qemu it
was previously write-only and ignored.

-Jordan

On Mon, Jun 29, 2009 at 11:46 AM, Alexander Graf <agraf@suse.de> wrote:

>
> On 29.06.2009, at 20:39, Anthony Liguori wrote:
>
>  Avi Kivity wrote:
>>
>>> I still think the read/write port route would
>>>> * better emulate systems,
>>>> * be more flexible (allowing software the option to read it),
>>>> * and, be easier to implement :)
>>>>
>>>> But, I think the most important part is to make the data accessible
>>>> somehow.  So, the monitor access method would work fine as well.
>>>>
>>>
>>> I don't object to read/write access.
>>>
>>
>> If there's read and write access, it needs to be part of the savevm state.
>>  Is it per-cpu?  If it's write only, then it doesn't need to be persisted in
>> savevm.
>>
>> I'd lean toward write-only unless there was a compelling reason to make it
>> read/write.
>>
>
> Well it was write-only before, so I don't see any harm in keeping it that
> way. Or am I mistaken there?
>
> Alex
>
>

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Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jordan Justen]

[-- Attachment #1: Type: text/plain, Size: 1023 bytes --]

Anthony,

If there's read and write access, it needs to be part of the savevm state.
>  Is it per-cpu?  If it's write only, then it doesn't need to be persisted in
> savevm.
>

I did implement and test the savevm/loadvm functionality.

-Jordan

On Mon, Jun 29, 2009 at 11:39 AM, Anthony Liguori <anthony@codemonkey.ws>wrote:

> Avi Kivity wrote:
>
>> I still think the read/write port route would
>>> * better emulate systems,
>>> * be more flexible (allowing software the option to read it),
>>> * and, be easier to implement :)
>>>
>>> But, I think the most important part is to make the data accessible
>>> somehow.  So, the monitor access method would work fine as well.
>>>
>>
>> I don't object to read/write access.
>>
>
> If there's read and write access, it needs to be part of the savevm state.
>  Is it per-cpu?  If it's write only, then it doesn't need to be persisted in
> savevm.
>
> I'd lean toward write-only unless there was a compelling reason to make it
> read/write.
>
> Regards,
>
> Anthony Liguori
>
>

[-- Attachment #2: Type: text/html, Size: 1845 bytes --]

[Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jordan Justen]

In PC systems, the byte I/O port 0x80 is commonly written to
by BIOS and/or system software as a simple checkpoint method.

This change adds an 'info port80' monitor command to retrieve
the last value written out to port80.

Signed-off-by: Jordan Justen <jljusten@gmail.com>
---
 Makefile.target |    2 +-
 hw/pc.c         |    6 +---
 hw/pc.h         |    7 ++++
 hw/port80.c     |  104 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 monitor.c       |    6 +++
 5 files changed, 119 insertions(+), 6 deletions(-)
 create mode 100644 hw/port80.c

diff --git a/Makefile.target b/Makefile.target
index a593503..155d9c3 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -563,7 +563,7 @@ obj-y += wdt_ib700.o wdt_i6300esb.o
 ifeq ($(TARGET_BASE_ARCH), i386)
 # Hardware support
 obj-y += ide.o pckbd.o vga.o $(sound-obj-y) dma.o
-obj-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
+obj-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o port80.o pc.o
 obj-y += cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
 obj-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
 obj-y += device-hotplug.o pci-hotplug.o smbios.o
diff --git a/hw/pc.c b/hw/pc.c
index 553ba5c..95ea295 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -87,10 +87,6 @@ static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
     qemu_register_reset(option_rom_reset, rrd);
 }
 
-static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
-{
-}
-
 /* MSDOS compatibility mode FPU exception support */
 static qemu_irq ferr_irq;
 /* XXX: add IGNNE support */
@@ -1253,7 +1249,7 @@ static void pc_init1(ram_addr_t ram_size,
     }
 
     /* init basic PC hardware */
-    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
+    port80_init();
 
     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 
diff --git a/hw/pc.h b/hw/pc.h
index 9fbae20..1d0423e 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -166,4 +166,11 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
 
 int cpu_is_bsp(CPUState *env);
+
+/* port80.c */
+
+typedef struct Port80State Port80State;
+
+Port80State *port80_init(void);
+
 #endif
diff --git a/hw/port80.c b/hw/port80.c
new file mode 100644
index 0000000..947b3cd
--- /dev/null
+++ b/hw/port80.c
@@ -0,0 +1,104 @@
+/*
+ * QEMU debug port 80 emulation
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ * Copyright (c) 2009 Jordan Justen
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw.h"
+#include "sysemu.h"
+#include "pc.h"
+#include "isa.h"
+#include "monitor.h"
+
+void do_monitor_info_port80(Monitor *mon);
+
+//#define DEBUG_PORT80
+//#define PORT80_READ_SUPPORT
+
+struct Port80State {
+    uint8_t data;
+};
+
+static Port80State *state;
+
+static void port80_ioport_write(void *opaque, uint32_t addr, uint32_t data)
+{
+    Port80State *s = opaque;
+
+#ifdef DEBUG_PORT80
+    printf("port%02x: write val=0x%02x\n", addr, data);
+#endif
+    s->data = data;
+}
+
+#ifdef PORT80_READ_SUPPORT
+static uint32_t port80_ioport_read(void *opaque, uint32_t addr)
+{
+    Port80State *s = opaque;
+    int ret;
+    ret = s->data;
+#ifdef DEBUG_PORT80
+    printf("port%02x: read val=0x%02x\n", addr, ret);
+#endif
+    return ret;
+}
+#endif
+
+static void port80_save(QEMUFile *f, void *opaque)
+{
+    Port80State *s = opaque;
+
+    qemu_put_byte(f, s->data);
+}
+
+static int port80_load(QEMUFile *f, void *opaque, int version_id)
+{
+    Port80State *s = opaque;
+
+    if (version_id != 1)
+        return -EINVAL;
+
+    s->data = qemu_get_byte(f);
+    state = s;
+    return 0;
+}
+
+void do_monitor_info_port80(Monitor *mon)
+{
+    monitor_printf(mon, "0x%02x\n", state->data);
+}
+
+Port80State *port80_init()
+{
+    Port80State *s;
+
+    s = qemu_mallocz(sizeof(Port80State));
+    state = s;
+
+    register_ioport_write(0x80, 1, 1, port80_ioport_write, s);
+#ifdef PORT80_READ_SUPPORT
+    register_ioport_read(0x80, 1, 1, port80_ioport_read, s);
+#endif
+
+    register_savevm("port80", 0x80, 1, port80_save, port80_load, s);
+    return s;
+}
+
diff --git a/monitor.c b/monitor.c
index bad79fe..a128d43 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1677,6 +1677,10 @@ static void do_acl_remove(Monitor *mon, const char *aclname, const char *match)
     }
 }
 
+#if defined(TARGET_I386)
+void do_monitor_info_port80(Monitor *mon);
+#endif
+
 static const mon_cmd_t mon_cmds[] = {
 #include "qemu-monitor.h"
     { NULL, NULL, },
@@ -1715,6 +1719,8 @@ static const mon_cmd_t info_cmds[] = {
       "", "show the active virtual memory mappings", },
     { "hpet", "", do_info_hpet,
       "", "show state of HPET", },
+    { "port80", "", do_monitor_info_port80,
+      "", "show value of the last write to i/o port 0x80", },
 #endif
     { "jit", "", do_info_jit,
       "", "show dynamic compiler info", },
-- 
1.6.0.4

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Anthony Liguori]

Jordan Justen wrote:
> In PC systems, the byte I/O port 0x80 is commonly written to
> by BIOS and/or system software as a simple checkpoint method.
>
> This change adds an 'info port80' monitor command to retrieve
> the last value written out to port80.
>   

Avi had suggested something like info debugreg.  I think something like 
that would be better as using the name "port80" makes it a very i386 
centric monitor option.

>  
>      /* init basic PC hardware */
> -    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
> +    port80_init();
>   

We really ought to make this a SysBus qdev device.  To do this, right 
here you would call:

sysbus_create_simple("pc,port80", -1, NULL);

>      register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
>  
> diff --git a/hw/pc.h b/hw/pc.h
> index 9fbae20..1d0423e 100644
> --- a/hw/pc.h
> +++ b/hw/pc.h
> @@ -166,4 +166,11 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
>  void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
>  
>  int cpu_is_bsp(CPUState *env);
> +
> +/* port80.c */
> +
> +typedef struct Port80State Port80State;
> +
> +Port80State *port80_init(void);
> +
>   

You would no longer need this.

>  #endif
> diff --git a/hw/port80.c b/hw/port80.c
> new file mode 100644
> index 0000000..947b3cd
> --- /dev/null
> +++ b/hw/port80.c
> @@ -0,0 +1,104 @@
> +/*
> + * QEMU debug port 80 emulation
> + *
> + * Copyright (c) 2003-2004 Fabrice Bellard
> + * Copyright (c) 2009 Jordan Justen
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +#include "hw.h"
> +#include "sysemu.h"
> +#include "pc.h"
> +#include "isa.h"
> +#include "monitor.h"
> +
> +void do_monitor_info_port80(Monitor *mon);
> +
> +//#define DEBUG_PORT80
> +//#define PORT80_READ_SUPPORT
>   
I'd rather not have the device model change based on #defines.  Either 
remove read support or enable it unconditionally.

> +struct Port80State {
> +    uint8_t data;
> +};

Add a SysBusDevice to this.


> +Port80State *port80_init()
>   

This becomes:

static void port80_init(SysBusDevice *dev)

> +{
> +    Port80State *s;
> +
> +    s = qemu_mallocz(sizeof(Port80State));
> +    state = s;
>   

This becomes:

s = FROM_SYSBUS(Port80State, dev);

> +    register_ioport_write(0x80, 1, 1, port80_ioport_write, s);
> +#ifdef PORT80_READ_SUPPORT
> +    register_ioport_read(0x80, 1, 1, port80_ioport_read, s);
> +#endif
> +
> +    register_savevm("port80", 0x80, 1, port80_save, port80_load, s);
> +    return s;
> +}
>   

Then you need to add a device_init() that calls sysbus_register_dev().

Regards,

Anthony Liguori

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Avi Kivity]

On 06/29/2009 06:26 PM, Jordan Justen wrote:
> Avi,
>
> Well, I am not sure if this it globally the case for PC motherboards, 
> but in my experience, it has been read/write.

It's just some random memory that might not actually be grounded in reality.

>
> At least for a system such as qemu, it make it difficult to use the 
> port80 checkpoint of software without being able to read the last 
> value written.

Why would software ever need to read it?  You want a monitor command so 
the user can read it.  I don't recall ever seeing a read of port 80 (I 
don't have any objections to that though).

-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Jamie Lokier]

Avi Kivity wrote:
> On 06/29/2009 06:26 PM, Jordan Justen wrote:
> >Avi,
> >
> >Well, I am not sure if this it globally the case for PC motherboards, 
> >but in my experience, it has been read/write.
> 
> It's just some random memory that might not actually be grounded in reality.

It is not memory, and it's not even an I/O port.

On many PCs, at least historically, it resolves to an ISA bus cycle
which no device responds to, and therefore takes about 1 microsecond
with side effects which help some ISA devices (on other I/O ports) to
work.  Including 2MHz ISA devices on an 8MHz ISA bus... so it has to
be a port which isn't on the device it's helping :-)

(Good) modern chipsets tend to not need the delay or side effects, but
they emulate the delay anyway.

When an ISA BIOS POST debugging card is plugged in, or if there's one
on the motherboard, then it catches the writes and displays them as
hex on LEDs.  That changes the timing and can in principle break some
things...

Some Linux distros write to port 0xed instead of 0x80 now, because
some HP/Compaq laptops break when writing to port 0x80 after ACPI is
enabled.  (Silly BIOS bugs).  But 0xed breaks some old ISA systems,
because it doesn't have quite the same bus side effects.  Enjoy.

> >At least for a system such as qemu, it make it difficult to use the 
> >port80 checkpoint of software without being able to read the last 
> >value written.
> 
> Why would software ever need to read it?  You want a monitor command so 
> the user can read it.  I don't recall ever seeing a read of port 80 (I 
> don't have any objections to that though).

Because most ISA PCs don't have anything there, reading won't return
anything interesting.  It won't return the value written.

But maybe with a BIOS POST debugging card, and/or maybe with some 
chipsets which are emulating the port... I don't know.

-- Jamie

Re: [Qemu-devel] [PATCH] Implement PC port80 debug register.

[Carl-Daniel Hailfinger]

On 29.06.2009 17:36, Avi Kivity wrote:
> On 06/29/2009 06:26 PM, Jordan Justen wrote:
>> Well, I am not sure if this it globally the case for PC motherboards,
>> but in my experience, it has been read/write.
>
> Why would software ever need to read it?  You want a monitor command
> so the user can read it.  I don't recall ever seeing a read of port 80
> (I don't have any objections to that though).

AFAIK some Linux versions use port 0x80 reads (instead of writes) for
some delays (grep for REALLY_SLOW_IO) because some hardware vendors
started abusing writes to port 0x80 for communication with embedded
controllers.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/