From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MVUEw-0000j9-SL for qemu-devel@nongnu.org; Mon, 27 Jul 2009 13:43:58 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MVUEr-0000ix-Fq for qemu-devel@nongnu.org; Mon, 27 Jul 2009 13:43:57 -0400 Received: from [199.232.76.173] (port=33147 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MVUEr-0000iu-9J for qemu-devel@nongnu.org; Mon, 27 Jul 2009 13:43:53 -0400 Received: from mail-yw0-f185.google.com ([209.85.211.185]:46327) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MVUEp-0000s2-Dr for qemu-devel@nongnu.org; Mon, 27 Jul 2009 13:43:52 -0400 Received: by ywh15 with SMTP id 15so676663ywh.4 for ; Mon, 27 Jul 2009 10:43:50 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1248626273.28944.3.camel@ufo> References: <1248608109.15752.40.camel@ufo> <1248626273.28944.3.camel@ufo> Date: Mon, 27 Jul 2009 10:43:48 -0700 Message-ID: <2a50f7880907271043h621ebb8dif547e3966b503296@mail.gmail.com> Subject: Re: [Qemu-devel] Intel 440bx hardware emulation correctness From: Jordan Justen Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Cristi Magherusan Cc: qemu-devel@nongnu.org Cristi, My impression is that QEMU does not focus on strict hardware emulation. I think it would be counter-productive to (what I see as) QEMU's main goals ... to emulate a functional system with good performance. It seems that the level of hardware compatibility is driven by software dependencies. Essentially, if an OS driver expects the hardware to behave a certain way, then QEMU will emulate it to achieve compatibility. But, since the OS's do not generally know about SPD & configuring the chipset memory, it is easier to ignore this completely in QEMU. -Jordan On Sun, Jul 26, 2009 at 9:37 AM, Cristi Magherusan wrote: > On Sun, 2009-07-26 at 14:35 +0300, Cristi Magherusan wrote: >> Hello, >> >> >> Does qemu aim to completely emulate the Intel 440bx northbridge hardware >> (and maybe other) to detail, or instead does it on purpose skip some >> parts for the sake of simplicity? >> >> As an example, I've seen that the RAM parameters are written in CMOS >> instead of doing it using SPD and some RAM control registers, as >> documented in the 440 datasheet. >> >> This only affects the BIOS code that does RAM detection, so the Bochs >> BIOS code would also need to be changed accordingly. > > Actually, in fact I'm interested to find out wether there are other > differences between qemu and a real 440bx-based motherboard, besides RAM > detection. > > I'm asking because I'm willing to rewrite the coreboot qemu support code > based on the generic northbridge/southbridge code. > > Thanks, > Cristi > > -- > Ing. Cristi M=C4=83gheru=C8=99an, System/Network Engineer > Technical University of Cluj-Napoca, Romania > http://cc.utcluj.ro =C2=A0+40264 401247 >