From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
laurent@vivier.eu, qemu-devel@nongnu.org
Subject: Re: [PATCH 18/30] swim: add trace events for IWM and ISM registers
Date: Thu, 25 May 2023 19:58:07 +0200 [thread overview]
Message-ID: <2a8469e0-760a-356c-0f61-bc3aa705f1d1@linaro.org> (raw)
In-Reply-To: <20230524211104.686087-19-mark.cave-ayland@ilande.co.uk>
On 24/5/23 23:10, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/block/swim.c | 14 ++++++++++++++
> hw/block/trace-events | 7 +++++++
> 2 files changed, 21 insertions(+)
> diff --git a/hw/block/trace-events b/hw/block/trace-events
> index 34be8b9135..c041ec45e3 100644
> --- a/hw/block/trace-events
> +++ b/hw/block/trace-events
> @@ -90,3 +90,10 @@ m25p80_read_data(void *s, uint32_t pos, uint8_t v) "[%p] Read data 0x%"PRIx32"=0
> m25p80_read_sfdp(void *s, uint32_t addr, uint8_t v) "[%p] Read SFDP 0x%"PRIx32"=0x%"PRIx8
> m25p80_binding(void *s) "[%p] Binding to IF_MTD drive"
> m25p80_binding_no_bdrv(void *s) "[%p] No BDRV - binding to RAM"
> +
> +# swim.c
> +swim_swimctrl_read(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64
> +swim_swimctrl_write(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64
> +swim_iwmctrl_read(int reg, unsigned size, uint64_t value) "reg=%d size=%u value=0x%"PRIx64
> +swim_iwmctrl_write(int reg, unsigned size, uint64_t value) "reg=%d size=%u value=0x%"PRIx64
Preferably 'unsigned reg', otherwise:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2023-05-25 17:59 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-24 21:10 [PATCH 00/30] q800: add support for booting MacOS Classic Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 01/30] q800: fix up minor spacing issues in hw_compat_q800 GlobalProperty array Mark Cave-Ayland
2023-05-30 11:15 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 02/30] q800: introduce Q800MachineState Mark Cave-Ayland
2023-05-30 11:15 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 03/30] q800: rename q800_init() to q800_machine_init() Mark Cave-Ayland
2023-05-30 11:16 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 04/30] q800: move CPU object into Q800MachineState Mark Cave-Ayland
2023-05-25 8:07 ` Philippe Mathieu-Daudé
2023-05-30 11:18 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 05/30] q800: move ROM memory region to Q800MachineState Mark Cave-Ayland
2023-05-25 8:08 ` Philippe Mathieu-Daudé
2023-05-30 11:19 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 06/30] q800: move GLUE device " Mark Cave-Ayland
2023-05-30 11:19 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 07/30] q800: introduce mac-io container memory region Mark Cave-Ayland
2023-05-30 11:23 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 08/30] q800: reimplement mac-io region aliasing using IO " Mark Cave-Ayland
2023-05-30 11:23 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 09/30] q800: add djMEMC memory controller Mark Cave-Ayland
2023-05-25 8:12 ` Philippe Mathieu-Daudé
2023-05-30 8:07 ` Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 10/30] q800: add machine id register Mark Cave-Ayland
2023-05-25 8:14 ` Philippe Mathieu-Daudé
2023-05-24 21:10 ` [PATCH 11/30] q800: implement additional machine id bits on VIA1 port A Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 12/30] q800: add IOSB subsystem Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 13/30] q800: allow accesses to RAM area even if less memory is available Mark Cave-Ayland
2023-05-25 8:20 ` Philippe Mathieu-Daudé
2023-05-30 11:25 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 14/30] audio: add Apple Sound Chip (ASC) emulation Mark Cave-Ayland
2023-05-29 11:43 ` Volker Rümelin
2023-05-24 21:10 ` [PATCH 15/30] asc: generate silence if FIFO empty but engine still running Mark Cave-Ayland
2023-05-29 11:40 ` Volker Rümelin
2023-05-30 11:27 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 16/30] q800: add Apple Sound Chip (ASC) audio to machine Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 17/30] q800: add easc bool machine class property to switch between ASC and EASC Mark Cave-Ayland
2023-05-30 11:28 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 18/30] swim: add trace events for IWM and ISM registers Mark Cave-Ayland
2023-05-25 17:58 ` Philippe Mathieu-Daudé [this message]
2023-05-30 11:29 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 19/30] swim: split into separate IWM and ISM register blocks Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 20/30] swim: update IWM/ISM register block decoding Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 21/30] mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 22/30] mac_via: fix rtc command decoding from PRAM addresses 0x0 to 0xf Mark Cave-Ayland
2023-05-30 13:37 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 23/30] mac_via: fix rtc command decoding for the PRAM seconds registers Mark Cave-Ayland
2023-05-30 13:38 ` Laurent Vivier
2023-05-24 21:10 ` [PATCH 24/30] mac_via: workaround NetBSD ADB bus enumeration issue Mark Cave-Ayland
2023-05-24 21:10 ` [PATCH 25/30] mac_via: implement ADB_STATE_IDLE state if shift register in input mode Mark Cave-Ayland
2023-05-24 21:11 ` [PATCH 26/30] mac_via: always clear ADB interrupt when switching to A/UX mode Mark Cave-Ayland
2023-05-24 21:11 ` [PATCH 27/30] q800: add ESCC alias at 0xc000 Mark Cave-Ayland
2023-05-24 21:11 ` [PATCH 28/30] q800: add alias for MacOS toolbox ROM at 0x40000000 Mark Cave-Ayland
2023-05-24 21:11 ` [PATCH 29/30] mac_via: extend timer calibration hack to work with A/UX Mark Cave-Ayland
2023-05-24 21:11 ` [PATCH 30/30] mac_via: work around QEMU unaligned MMIO access bug Mark Cave-Ayland
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