From: Richard Henderson <richard.henderson@linaro.org>
To: Ilya Leoshkevich <iii@linux.ibm.com>, qemu-devel@nongnu.org
Cc: david@redhat.com, qemu-s390x@nongnu.org,
Claudio Fontana <cfontana@suse.de>
Subject: Re: [PATCH] target/s390x: Move trans_exc_code update to do_program_interrupt
Date: Mon, 31 Jul 2023 07:55:52 -0700 [thread overview]
Message-ID: <2a9d2f15-4f1b-19c7-7feb-e8597c1c71e3@linaro.org> (raw)
In-Reply-To: <f054a26eee85be8dba7095b6c4c86fd79331fcd4.camel@linux.ibm.com>
On 7/31/23 01:26, Ilya Leoshkevich wrote:
>>> + case PGM_PROTECTION:
>>> + case PGM_TRANS_SPEC:
>>> + assert(env->int_pgm_code == env->tlb_fill_exc);
>>> + set_trans_exc_code = true;
>>> + advance = true;
>>> + break;
>>
>> These exceptions came from seeing an early kernel fault, grepping for
>> the set of
>> exceptions raised in mmu_helper.c, and eliminating PGM_ADDRESSING per
>> the first hunk.
>
> Does POp specify that the CPU stores Translation-Exception
> Identification on Translation-Specification Exceptions
> (PGM_TRANS_SPEC)? I re-read the 0xA8 documentation a few times, but
> could not find it.
Neither could I.
> It's also interesting what the kernel was attempting when it got
> PGM_TRANS_SPEC and recovered from it. Maybe something else is wrong?
I think the kernel was testing PGM_PROTECTION, to see if LowCore protection worked.
But since that one wasn't listed for 0xA8 either, I preserved previous behaviour in
setting trans_exc_code for all mmu exceptions except for PGM_ADDRESSING.
r~
next prev parent reply other threads:[~2023-07-31 14:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-28 19:55 [PATCH] target/s390x: Move trans_exc_code update to do_program_interrupt Richard Henderson
2023-07-28 20:02 ` Richard Henderson
2023-07-31 8:26 ` Ilya Leoshkevich
2023-07-31 14:55 ` Richard Henderson [this message]
2023-07-31 14:59 ` Ilya Leoshkevich
2023-07-29 8:43 ` Claudio Fontana
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