From: Richard Henderson <richard.henderson@linaro.org>
To: Gustavo Romero <gustavo.romero@linaro.org>,
qemu-devel@nongnu.org, alex.bennee@linaro.org
Cc: philmd@linaro.org, peter.maydell@linaro.org
Subject: Re: [PATCH 1/2] target/arm: Move initialization of debug ID registers
Date: Thu, 20 Jun 2024 11:21:28 -0700 [thread overview]
Message-ID: <2af6449a-f4c2-422c-a92b-cfb11a5ae2d5@linaro.org> (raw)
In-Reply-To: <20240620181352.3590086-2-gustavo.romero@linaro.org>
On 6/20/24 11:13, Gustavo Romero wrote:
> @@ -1268,7 +1268,10 @@ void aarch64_max_tcg_initfn(Object *obj)
> t = FIELD_DP64(t, ID_AA64SMFR0, FA64, 1); /* FEAT_SME_FA64 */
> cpu->isar.id_aa64smfr0 = t;
>
> - /* Replicate the same data to the 32-bit id registers. */
> + /*
> + * Replicate the same values from the 32-bit max CPU to the 32-bit ID
> + * registers.
> + */
> aa32_max_features(cpu);
I think the previous comment is more accurate.
There is no separate "32-bit max CPU". There is one "max CPU", which supports both 32-bit
and 64-bit modes, and thus has both 32-bit and 64-bit ID registers.
The rest of the patch looks good.
r~
next prev parent reply other threads:[~2024-06-20 18:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-20 18:13 [PATCH 0/2] target/arm: Enable FEAT_Debugv8p8 for -cpu max Gustavo Romero
2024-06-20 18:13 ` [PATCH 1/2] target/arm: Move initialization of debug ID registers Gustavo Romero
2024-06-20 18:21 ` Richard Henderson [this message]
2024-06-21 14:41 ` Gustavo Romero
2024-06-20 18:13 ` [PATCH 2/2] target/arm: Enable FEAT_Debugv8p8 for -cpu max Gustavo Romero
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