From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: Re: [PATCH-for-10.1 1/4] target/sparc: Expose more CPU features
Date: Tue, 25 Mar 2025 07:11:14 -0700 [thread overview]
Message-ID: <2bfe3f4b-95d3-46a3-8236-75e7a8210a9f@linaro.org> (raw)
In-Reply-To: <20250325123927.74939-2-philmd@linaro.org>
On 3/25/25 05:39, Philippe Mathieu-Daudé wrote:
> Various features were not displayed or settable from command line.
>
> Diff of 'qemu-system-sparc -cpu help':
>
> ...
> TI-SuperSparc-60 (IU 40000000 FPU 00000000 MMU 01000800 NWINS 8)
> TI-SuperSparc-61 (IU 44000000 FPU 00000000 MMU 01000000 NWINS 8)
> TI-SuperSparc-II (IU 40000000 FPU 00000000 MMU 08000000 NWINS 8)
> - LEON2 (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8)
> - LEON3 (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8)
> + LEON2 (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) +shutdown
> + LEON3 (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) +shutdown +asr17 +cachectrl +powerdown +casa
> Default CPU feature flags (use '-' to remove): mul div fsmuld
> -Available CPU feature flags (use '+' to add): float128
> +Available CPU feature flags (use '+' to add): shutdown asr17 cachectrl powerdown casa float128
> Numerical features (use '=' to set): iu_version fpu_version mmu_version nwindows
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/sparc/cpu.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index 57161201173..37406227cb7 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -548,6 +548,11 @@ static const sparc_def_t sparc_defs[] = {
> /* This must match sparc_cpu_properties[]. */
> static const char * const feature_name[] = {
> [CPU_FEATURE_BIT_FLOAT128] = "float128",
> + [CPU_FEATURE_BIT_TA0_SHUTDOWN] = "shutdown",
> + [CPU_FEATURE_BIT_POWERDOWN] = "powerdown",
> + [CPU_FEATURE_BIT_CACHE_CTRL] = "cachectrl",
> + [CPU_FEATURE_BIT_ASR17] = "asr17",
> + [CPU_FEATURE_BIT_CASA] = "casa",
> #ifdef TARGET_SPARC64
> [CPU_FEATURE_BIT_CMT] = "cmt",
> [CPU_FEATURE_BIT_GL] = "gl",
I'm not convinced this is a good idea.
The only effect of disabling these is to break LEON kernels. These features are not
exposed for kernel discovery, so you can't just turn them on and have them used on
supersparc either. They will certainly break anything sparc64.
r~
next prev parent reply other threads:[~2025-03-25 14:11 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-25 12:39 [PATCH-for-10.1 0/4] target/sparc: Spring cleanups around CPU features & LEON3 Philippe Mathieu-Daudé
2025-03-25 12:39 ` [PATCH-for-10.1 1/4] target/sparc: Expose more CPU features Philippe Mathieu-Daudé
2025-03-25 14:11 ` Richard Henderson [this message]
2025-03-25 14:43 ` Philippe Mathieu-Daudé
2025-03-25 12:39 ` [PATCH-for-10.1 2/4] target/sparc: Restrict SPARC64 specific features Philippe Mathieu-Daudé
2025-03-25 14:07 ` Richard Henderson
2025-03-25 14:41 ` Philippe Mathieu-Daudé
2025-03-25 12:39 ` [PATCH-for-10.1 3/4] target/sparc: Log unimplemented ASI load/store accesses Philippe Mathieu-Daudé
2025-03-26 14:49 ` Clément Chigot
2025-03-25 12:39 ` [PATCH-for-10.1 4/4] target/sparc: Move hardware fields from CPUSPARCState to SPARCCPU Philippe Mathieu-Daudé
2025-03-26 14:54 ` Clément Chigot
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