From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: BALATON Zoltan <balaton@eik.bme.hu>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Subject: Re: [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree
Date: Sun, 23 Jul 2023 09:13:25 -0300 [thread overview]
Message-ID: <2c2157ec-4736-9fee-691c-97fe081093e2@gmail.com> (raw)
In-Reply-To: <20230721221320.1311E7456AB@zero.eik.bme.hu>
On 7/21/23 19:13, BALATON Zoltan wrote:
> The board firmware handles this correctly following the Open Firmware
> standard which we missed. This fixes 64 bit BARs when using VOF.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
And queued. Thanks,
Daniel
> hw/ppc/pegasos2.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index 6475acfbed..075367d94d 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
> cells[j] |= cpu_to_be32(1 << 24);
> } else {
> - cells[j] |= cpu_to_be32(2 << 24);
> + if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
> + cells[j] |= cpu_to_be32(3 << 24);
> + } else {
> + cells[j] |= cpu_to_be32(2 << 24);
> + }
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
> cells[j] |= cpu_to_be32(4 << 28);
> }
prev parent reply other threads:[~2023-07-23 12:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-21 22:13 [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree BALATON Zoltan
2023-07-21 22:23 ` BALATON Zoltan
2023-07-23 12:13 ` Daniel Henrique Barboza [this message]
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