* [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree
@ 2023-07-21 22:13 BALATON Zoltan
2023-07-21 22:23 ` BALATON Zoltan
2023-07-23 12:13 ` Daniel Henrique Barboza
0 siblings, 2 replies; 3+ messages in thread
From: BALATON Zoltan @ 2023-07-21 22:13 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza
The board firmware handles this correctly following the Open Firmware
standard which we missed. This fixes 64 bit BARs when using VOF.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 6475acfbed..075367d94d 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
cells[j] |= cpu_to_be32(1 << 24);
} else {
- cells[j] |= cpu_to_be32(2 << 24);
+ if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ cells[j] |= cpu_to_be32(3 << 24);
+ } else {
+ cells[j] |= cpu_to_be32(2 << 24);
+ }
if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
cells[j] |= cpu_to_be32(4 << 28);
}
--
2.30.9
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree
2023-07-21 22:13 [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree BALATON Zoltan
@ 2023-07-21 22:23 ` BALATON Zoltan
2023-07-23 12:13 ` Daniel Henrique Barboza
1 sibling, 0 replies; 3+ messages in thread
From: BALATON Zoltan @ 2023-07-21 22:23 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza
On Sat, 22 Jul 2023, BALATON Zoltan wrote:
> The board firmware handles this correctly following the Open Firmware
> standard which we missed. This fixes 64 bit BARs when using VOF.
In case it helps review this is defined in page 5 of this document:
https://www.openbios.org/data/docs/bus.pci.pdf
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> hw/ppc/pegasos2.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index 6475acfbed..075367d94d 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
> cells[j] |= cpu_to_be32(1 << 24);
> } else {
> - cells[j] |= cpu_to_be32(2 << 24);
> + if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
> + cells[j] |= cpu_to_be32(3 << 24);
> + } else {
> + cells[j] |= cpu_to_be32(2 << 24);
> + }
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
> cells[j] |= cpu_to_be32(4 << 28);
> }
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree
2023-07-21 22:13 [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree BALATON Zoltan
2023-07-21 22:23 ` BALATON Zoltan
@ 2023-07-23 12:13 ` Daniel Henrique Barboza
1 sibling, 0 replies; 3+ messages in thread
From: Daniel Henrique Barboza @ 2023-07-23 12:13 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
On 7/21/23 19:13, BALATON Zoltan wrote:
> The board firmware handles this correctly following the Open Firmware
> standard which we missed. This fixes 64 bit BARs when using VOF.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
And queued. Thanks,
Daniel
> hw/ppc/pegasos2.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
> index 6475acfbed..075367d94d 100644
> --- a/hw/ppc/pegasos2.c
> +++ b/hw/ppc/pegasos2.c
> @@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
> cells[j] |= cpu_to_be32(1 << 24);
> } else {
> - cells[j] |= cpu_to_be32(2 << 24);
> + if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
> + cells[j] |= cpu_to_be32(3 << 24);
> + } else {
> + cells[j] |= cpu_to_be32(2 << 24);
> + }
> if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
> cells[j] |= cpu_to_be32(4 << 28);
> }
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-07-21 22:13 [PATCH] ppc/pegasos2: Fix reg property of 64 bit BARs in device tree BALATON Zoltan
2023-07-21 22:23 ` BALATON Zoltan
2023-07-23 12:13 ` Daniel Henrique Barboza
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